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Message-Id: <20181206143012.426964716@linuxfoundation.org>
Date: Thu, 6 Dec 2018 15:38:14 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Kristian Evensen <kristian.evensen@...il.com>,
Mathias Kresin <dev@...sin.me>,
Paul Burton <paul.burton@...s.com>,
John Crispin <john@...ozen.org>,
Ralf Baechle <ralf@...ux-mips.org>,
James Hogan <jhogan@...nel.org>, linux-mips@...ux-mips.org
Subject: [PATCH 4.9 015/101] MIPS: ralink: Fix mt7620 nd_sd pinmux
4.9-stable review patch. If anyone has any objections, please let me know.
------------------
From: Mathias Kresin <dev@...sin.me>
commit 7d35baa4e9ec4b717bc0e58a39cdb6a1c50f5465 upstream.
In case the nd_sd group is set to the sd-card function, Pins 45 + 46 are
configured as GPIOs. If they are blocked by the sd function, they can't
be used as GPIOs.
Reported-by: Kristian Evensen <kristian.evensen@...il.com>
Signed-off-by: Mathias Kresin <dev@...sin.me>
Signed-off-by: Paul Burton <paul.burton@...s.com>
Fixes: f576fb6a0700 ("MIPS: ralink: cleanup the soc specific pinmux data")
Patchwork: https://patchwork.linux-mips.org/patch/21220/
Cc: John Crispin <john@...ozen.org>
Cc: Ralf Baechle <ralf@...ux-mips.org>
Cc: James Hogan <jhogan@...nel.org>
Cc: linux-mips@...ux-mips.org
Cc: linux-kernel@...r.kernel.org
Cc: stable@...r.kernel.org # v3.18+
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
arch/mips/ralink/mt7620.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
@@ -81,7 +81,7 @@ static struct rt2880_pmx_func pcie_rst_g
};
static struct rt2880_pmx_func nd_sd_grp[] = {
FUNC("nand", MT7620_GPIO_MODE_NAND, 45, 15),
- FUNC("sd", MT7620_GPIO_MODE_SD, 45, 15)
+ FUNC("sd", MT7620_GPIO_MODE_SD, 47, 13)
};
static struct rt2880_pmx_group mt7620a_pinmux_data[] = {
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