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Date:   Fri, 07 Dec 2018 10:45:11 -0800 (PST)
From:   Palmer Dabbelt <palmer@...ive.com>
To:     Greg KH <gregkh@...uxfoundation.org>
CC:     anup@...infault.org, jslaby@...e.com, aou@...s.berkeley.edu,
        atish.patra@....com, Christoph Hellwig <hch@...radead.org>,
        robh@...nel.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-serial@...r.kernel.org
Subject:     Re: [PATCH 1/3] tty/serial: Add RISC-V SBI earlycon support

On Wed, 05 Dec 2018 01:58:46 PST (-0800), Greg KH wrote:
> On Tue, Dec 04, 2018 at 07:25:05PM +0530, Anup Patel wrote:
>> In RISC-V, the M-mode runtime firmware provide SBI calls for
>> debug prints. This patch adds earlycon support using RISC-V
>> SBI console calls. To enable it, just pass "earlycon=sbi" in
>> kernel parameters.
>>
>> Signed-off-by: Anup Patel <anup@...infault.org>
>
> This makes more sense to take through the riscv tree, so feel free to
> add:
>
> Acked-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
>
> to it and take it that way.

It should be in my for-next now.

Thanks!

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