linux-kernel - Coresight etmv4 enable over 32bit kernel

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <CALZhoSRaR-eMyr7HKUTDi5oRiJfRZ7x1NRRM49v-nn6U7e9sJg@mail.gmail.com>
Date:   Sat, 8 Dec 2018 20:04:50 +0800
From:   Lei Wen <adrian.wenl@...il.com>
To:     mathieu.poirier@...aro.org
Cc:     linux-kernel@...r.kernel.org,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        leiwen@...look.com
Subject: Coresight etmv4 enable over 32bit kernel

Hi Mathieu,

I am enabling etmv4 coresight over one Cortex-A7 soc, using 32bit kernel.
And I am following [1] to do experiment regarding the addr_range feature.
The default addr_range is set as _stext~_etext, and it works fine with
etb as sink,
and etm as source. I could see there are valid kernel addresses using OpenCSD.

But while I try to store one small range of address pair, which contain only one
kernel function. It doesn't behavior like what said in [1], the write
pointer would
grows rapidly with the read pointer. And I dump the etb buffer and parse it with
openCSD, finding that there is no I_ASYNC packet in the dump and is fulled with
I_NOT_SYNC.

So my question is why ETB continue to grow when there is no trigger at all?
Is it normal? I could provide more info if you need it.

[1]: https://wiki.linaro.org/WorklingGroups/Kernel/Coresight/traceDecodingWithDS5

Thanks,
Lei