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Message-ID: <f595c046-682c-0d4a-ce68-44d4634cedf2@fortanix.com>
Date: Sat, 8 Dec 2018 08:15:38 +0000
From: Jethro Beekman <jethro@...tanix.com>
To: Dave Hansen <dave.hansen@...el.com>,
Sean Christopherson <sean.j.christopherson@...el.com>,
Andy Lutomirski <luto@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
"x86@...nel.org" <x86@...nel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Peter Zijlstra <peterz@...radead.org>
CC: "H. Peter Anvin" <hpa@...or.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andy Lutomirski <luto@...capital.net>,
Jarkko Sakkinen <jarkko.sakkinen@...ux.intel.com>,
Josh Triplett <josh@...htriplett.org>,
Haitao Huang <haitao.huang@...ux.intel.com>,
"linux-sgx@...r.kernel.org" <linux-sgx@...r.kernel.org>,
"Dr. Greg" <greg@...ellic.com>
Subject: Re: [RFC PATCH v2 4/4] x86/vdso: Add __vdso_sgx_enter_enclave() to
wrap SGX enclave transitions
On 2018-12-08 00:14, Dave Hansen wrote:
> On 12/7/18 10:15 AM, Jethro Beekman wrote:
>> This is not sufficient to support the Fortanix SGX ABI calling
>> convention, which was designed to be mostly compatible with the SysV
>> 64-bit calling convention. The following registers need to be passed in
>> to an enclave from userspace: RDI, RSI, RDX, R8, R9, R10. The following
>> registers need to be passed out from an enclave to userspace: RDI, RSI,
>> RDX, R8, R9.
>
> Are you asking nicely to change the new Linux ABI to be consistent with
> your existing ABI? Or, are you saying that the new ABI *must* be
> compatible with this previous out-of-tree implementation?
What's being discussed here is one of the alternatives for SGX fault
handling, meant to improve the current status quo of having to use a
signal handler.
I'm merely providing a data point that the currently proposed solution
is not sufficient to support current use of the (ring 3) ENCLU
instruction. You might find this useful in determining whether proposed
kernel features will actually be used by users, and in further
developing this solution or other solutions to the fault handling issue.
If going with the vDSO solution, I think something with semantics closer
to the actual instruction would be preferred, like the following:
notrace __attribute__((naked)) long __vdso_sgx_enclu_with_aep()
{
asm volatile(
" lea 2f(%%rip), %%rcx\n"
"1: enclu\n"
"2: ret\n"
".pushsection .fixup, \"ax\" \n"
"3: jmp 2b\n"
".popsection\n"
_ASM_VDSO_EXTABLE_HANDLE(1b, 3b)
:::
);
}
--
Jethro Beekman | Fortanix
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