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Message-Id: <20181210135633.30283-1-srinivas.kandagatla@linaro.org>
Date: Mon, 10 Dec 2018 13:56:29 +0000
From: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
To: marc.zyngier@....com
Cc: sudeep.holla@....com, tglx@...utronix.de, jason@...edaemon.net,
linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
rnayak@...eaurora.org, sboyd@...nel.org,
bjorn.andersson@...aro.org, nicolas.dechesne@...aro.org,
ctatlor97@...il.com, vkoul@...nel.org, robh+dt@...nel.org,
devicetree@...r.kernel.org,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Subject: [PATCH v5 0/4] irqchip/gic-v3: Add support to DT based quirk for msm8996
Access to GICR_WAKER is restricted on msm8996 SoC in Hypervisor.
There are many devices out there with this restriction in place
and there has been no update to this firmware since last few years,
making those devices totally unusable for upstream development.
My previous attempts to add quirk based on IIDR register value seems to be
flawed by the fact that the value conflicted with other SoCs.
Last Suggestion by Marc Z using compatible seems to be the only way to apply
quirks required for msm8996 based SoCs.
Here is the patchset which add new compatible for msm8996 gicv3 and add
support gic_enable_of_quirks() followed by the actual quirk required for msm8996.
Without this quirk many qcom SoCs (atleast 3 that I know) are
unable to boot mainline.
Changes since v4:
- Added missing empty entry into quirk table.
Srinivas Kandagatla (4):
dt-bindings/gic-v3: Add msm8996 compatible string
irqchip/gic: common: add support to device tree based quirks
irqchip: gic-v3: Add quirk for msm8996 secured registers
arm64: dts: add msm8996 compatible to gicv3
.../interrupt-controller/arm,gic-v3.txt | 4 ++-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
drivers/irqchip/irq-gic-common.c | 12 +++++++++
drivers/irqchip/irq-gic-common.h | 3 +++
drivers/irqchip/irq-gic-v3.c | 27 +++++++++++++++++++
5 files changed, 46 insertions(+), 2 deletions(-)
--
2.19.2
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