linux-kernel - Re: [PATCH v6 08/13] arm64: expose user PAC bit positions via ptrace

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20181210142944.GA13100@edgewater-inn.cambridge.arm.com>
Date:   Mon, 10 Dec 2018 14:29:45 +0000
From:   Will Deacon <will.deacon@....com>
To:     Richard Henderson <richard.henderson@...aro.org>
Cc:     Catalin Marinas <catalin.marinas@....com>,
        Kristina Martsenko <kristina.martsenko@....com>,
        linux-arm-kernel@...ts.infradead.org,
        Mark Rutland <mark.rutland@....com>,
        Andrew Jones <drjones@...hat.com>,
        Jacob Bramley <jacob.bramley@....com>,
        Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Adam Wallis <awallis@...eaurora.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Christoffer Dall <christoffer.dall@....com>,
        kvmarm@...ts.cs.columbia.edu, Cyrill Gorcunov <gorcunov@...il.com>,
        Ramana Radhakrishnan <ramana.radhakrishnan@....com>,
        Amit Kachhap <amit.kachhap@....com>,
        Dave P Martin <dave.martin@....com>,
        linux-kernel@...r.kernel.org, Kees Cook <keescook@...omium.org>,
        Steve Capper <Steve.Capper@....com>
Subject: Re: [PATCH v6 08/13] arm64: expose user PAC bit positions via ptrace

On Mon, Dec 10, 2018 at 08:22:06AM -0600, Richard Henderson wrote:
> On 12/10/18 6:03 AM, Catalin Marinas wrote:
> >> However, it won't be too long before someone implements support for
> >> ARMv8.2-LVA, at which point, without changes to mandatory pointer tagging, we
> >> will only have 3 authentication bits: [54:52].  This seems useless and easily
> >> brute-force-able.
> > 
> > Such support is already here (about to be queued):
> > 
> > https://lore.kernel.org/linux-arm-kernel/20181206225042.11548-1-steve.capper@arm.com/
> 
> Thanks for the pointer.
> 
> >> Unfortunately, there is no obvious path to making this optional that does not
> >> break compatibility with Documentation/arm64/tagged-pointers.txt.
> > 
> > There is also the ARMv8.5 MTE (memory tagging) which relies on tagged
> > pointers.
> 
> So it does.  I hadn't read through that extension completely before.
> 
> > An alternative would be to allow the opt-in to 52-bit VA, leaving it at
> > 48-bit by default. However, it has the problem of changing the PAC size
> > and not being able to return.
> 
> Perhaps the opt-in should be at exec time, with ELF flags (or equivalent) on
> the application.  Because, as you say, changing the shape of the PAC in the
> middle of execution is in general not possible.

I think we'd still have a potential performance problem with that approach,
since we'd end up having to context-switch TCR.T0SZ, which is permitted to
be cached in a TLB and would therefore force us to introduce TLB
invalidation when context-switching between tasks using 52-bit VAs and tasks
using 48-bit VAs.

There's a chance we could get the architecture tightened here, but it's
not something we've pushed for so far and it depends on what's already been
built.

Will