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Message-ID: <20181211213504.GA29643@bogus>
Date:   Tue, 11 Dec 2018 15:35:04 -0600
From:   Rob Herring <robh@...nel.org>
To:     Anson Huang <anson.huang@....com>
Cc:     "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        dl-linux-imx <linux-imx@....com>
Subject: Re: [PATCH] dt-bindings: timer: gpt: update binding doc

On Fri, Nov 23, 2018 at 09:10:09AM +0000, Anson Huang wrote:
> The i.MX GPT timer driver binding doc is out of date,
> the "interrupts", "clocks" and "clock-names" do NOT match
> current GPT driver implementation, update it and use i.MX6SX
> as example.
> 
> Signed-off-by: Anson Huang <Anson.Huang@....com>
> ---
>  .../devicetree/bindings/timer/fsl,imxgpt.txt       | 22 +++++++++++++---------
>  1 file changed, 13 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> index 9809b11..4e9fa16 100644
> --- a/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> +++ b/Documentation/devicetree/bindings/timer/fsl,imxgpt.txt
> @@ -2,17 +2,21 @@ Freescale i.MX General Purpose Timer (GPT)
>  
>  Required properties:
>  
> -- compatible : should be "fsl,<soc>-gpt"
> -- reg : Specifies base physical address and size of the registers.
> -- interrupts : A list of 4 interrupts; one per timer channel.
> -- clocks : The clocks provided by the SoC to drive the timer.
> +- compatible : should be "fsl,<soc>-gpt".

This should enumerate valid <soc> values.

> +- reg : specifies base physical address and size of the registers.
> +- interrupts : should be the clock event device interrupt.
> +- clocks : the clocks provided by the SoC to drive the timer, must contain
> +           an entry for each entry in clock-names.
> +- clock-names : must include an "per" or "osc_per" entry, and "ipg" entry
> +                is optional according to SoC design.

Need to define the order. Ideally the optional clock should be last, but 
that's not what the example has.

>  
>  Example:
>  
> -gpt1: timer@...03000 {
> -	compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
> -	reg = <0x10003000 0x1000>;
> -	interrupts = <26>;
> -	clocks = <&clks 46>, <&clks 61>;
> +gpt: gpt@...8000 {

timer@...

> +	compatible = "fsl,imx6sx-gpt", "fsl,imx31-gpt";

You haven't documented "fsl,imx31-gpt" is a valid fallback. Is the old 
example not still valid for imx27?

> +	reg = <0x02098000 0x4000>;

Using a size > 4KB just wastes virtual space which is valuable on 32-bit 
systems with >= 1GB RAM.

> +	interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
> +	clocks = <&clks IMX6SX_CLK_GPT_BUS>,
> +		 <&clks IMX6SX_CLK_GPT_3M>;
>  	clock-names = "ipg", "per";
>  };
> -- 
> 2.7.4
> 

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