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Message-ID: <86tvjhbao7.wl-marc.zyngier@arm.com>
Date:   Thu, 13 Dec 2018 17:26:16 +0000
From:   Marc Zyngier <marc.zyngier@....com>
To:     Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:     sudeep.holla@....com, tglx@...utronix.de, jason@...edaemon.net,
        linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        rnayak@...eaurora.org, sboyd@...nel.org,
        bjorn.andersson@...aro.org, nicolas.dechesne@...aro.org,
        ctatlor97@...il.com, vkoul@...nel.org, robh+dt@...nel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v5 4/4] arm64: dts: add msm8996 compatible to gicv3

On Mon, 10 Dec 2018 13:56:33 +0000,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org> wrote:
> 
> Add compatible to gicv3 node to enable quirk required to restrict writing
> to GICR_WAKER register which is restricted on msm8996 SoC in Hypervisor.
> 
> With this quirk MSM8996 can at least boot out of mainline, which can help
> community to work with boards based on MSM8996.
> 
> Without this patch Qualcomm DB820c board reboots on mainline.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> index 8585c61e32ef..cd9650cea05d 100644
> --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
> @@ -404,7 +404,7 @@
>  		};
>  
>  		intc: interrupt-controller@...0000 {
> -			compatible = "arm,gic-v3";
> +			compatible = "qcom,msm8996-gic-v3", "arm,gic-v3";
>  			#interrupt-cells = <3>;
>  			interrupt-controller;
>  			#redistributor-regions = <1>;

I've applied the first 3 patches to irqchip/next. Please route this
one via arm-soc.

Thanks,

	M.

-- 
Jazz is not dead, it just smell funny.

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