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Message-Id: <1544732500-6866-1-git-send-email-fabrizio.castro@bp.renesas.com>
Date: Thu, 13 Dec 2018 20:21:40 +0000
From: Fabrizio Castro <fabrizio.castro@...renesas.com>
To: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Cc: Fabrizio Castro <fabrizio.castro@...renesas.com>,
Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Simon Horman <horms@...ge.net.au>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>,
linux-renesas-soc@...r.kernel.org
Subject: [PATCH] dt-bindings: PCI: rcar: Add device tree support for r8a774c0
Add PCIe support for the RZ/G2E (a.k.a. R8A774C0).
Signed-off-by: Fabrizio Castro <fabrizio.castro@...renesas.com>
---
Documentation/devicetree/bindings/pci/rcar-pci.txt | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt
index 976ef7b..bb89fed 100644
--- a/Documentation/devicetree/bindings/pci/rcar-pci.txt
+++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt
@@ -3,6 +3,7 @@
Required properties:
compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
"renesas,pcie-r8a7744" for the R8A7744 SoC;
+ "renesas,pcie-r8a774c0" for the R8A774C0 SoC;
"renesas,pcie-r8a7779" for the R8A7779 SoC;
"renesas,pcie-r8a7790" for the R8A7790 SoC;
"renesas,pcie-r8a7791" for the R8A7791 SoC;
@@ -13,7 +14,8 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
"renesas,pcie-r8a77990" for the R8A77990 SoC;
"renesas,pcie-rcar-gen2" for a generic R-Car Gen2 or
RZ/G1 compatible device.
- "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 compatible device.
+ "renesas,pcie-rcar-gen3" for a generic R-Car Gen3 or
+ RZ/G2 compatible device.
When compatible with the generic version, nodes must list the
SoC-specific version corresponding to the platform first
@@ -37,7 +39,8 @@ compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC;
Optional properties:
- phys: from common PHY binding: PHY phandle and specifier (only make sense
- for R-Car gen3 SoCs where the PCIe PHYs have their own register blocks).
+ for R-Car gen3 and RZ/G2 SoCs where the PCIe PHYs have their own
+ register blocks).
- phy-names: from common PHY binding: should be "pcie".
Example:
--
2.7.4
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