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Message-ID: <CACRpkdbiX=9tDnE+tR7Jj-QEY_=_MvS9v8Jg8X7MzQcX7aPp-Q@mail.gmail.com>
Date: Thu, 13 Dec 2018 11:45:35 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: christophe.kerello@...com
Cc: Boris Brezillon <boris.brezillon@...tlin.com>,
Miquèl Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
David Woodhouse <dwmw2@...radead.org>,
Brian Norris <computersforpeace@...il.com>,
Mark Vasut <marek.vasut@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-mtd@...ts.infradead.org,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
linux-stm32@...md-mailman.stormreply.com
Subject: Re: [ v3 2/3] mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash
controller driver
On Fri, Dec 7, 2018 at 5:53 PM Christophe Kerello
<christophe.kerello@...com> wrote:
> On 12/7/18 10:06 AM, Linus Walleij wrote:
> Based on FMC2 datasheet,
> The FMC2 controller includes 2 memory controllers:
> - the NOR/PSRAM memory controller
> - the NAND memory controller
>
> The NOR/PSRAM controller mapping is starting at 0.
> The NAND controller mapping is starting at 0x80.
>
> We have only planned to develop a driver for the NAND memory controller.
> There is currently no customer request to develop the NOR/PSRAM memory
> controller.
OK I get it, so there is no FSMC (v1), but a NOR controller, thanks!
If people need to access the NOR controller I think they can just patch
your driver to handle both or have a second driver on the side
(I suspect the pins are anyways set up such that you can just
use either NOR or NAND.)
Yours,
Linus Walleij
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