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Message-ID: <cf5ac5cc-3696-a4fc-ae64-4f0304ab7df3@micronovasrl.com>
Date:   Thu, 13 Dec 2018 12:42:29 +0100
From:   Giulio Benetti <giulio.benetti@...ronovasrl.com>
To:     Jonathan Liu <net147@...il.com>
Cc:     Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        dri-devel <dri-devel@...ts.freedesktop.org>,
        linux-kernel <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/sun4i: fix HSYNC and VSYNC polarity

Hi Jonathan,

Il 13/12/2018 03:55, Jonathan Liu ha scritto:
>> Can you precisely point me the sources of:
>> - u-boot
>> - kernel
>> - dts
>>
>> you're using?
>>
>> Thanks
> 
> U-Boot - git tag v2017.03
> Linux - git tag v4.19.6
> DTS - see device tree changes in
> https://github.com/net147/linux/tree/sun7i-drm-wip but change the
> compatible to "innolux,at070tn92"

With Linux v4.19.6 "innolux,at070tn92" doesn't even work and I suspect 
it is because of clock frequency tolerance check for pll setting, so it 
gets discarded from drm resulting in not having a crtc.

Anyway I've just re-checked the signals using another display:
"innolux,at043tn24" that has a more rounded clock frequency, so it's 
accepted by drm and **signals are correct**.
Unfortunately I don't have your same display here to test, so I can't 
help you about that precise panel.

Sorry.
Best regards
-- 
Giulio Benetti
CTO

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