linux-kernel - Re: [PATCH v2 3/3] spi: meson-axg: add a linear clock divider support

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Message-ID: <35518e71-027c-749e-1075-19ddc0410b19@amlogic.com>
Date:   Thu, 13 Dec 2018 21:25:38 +0800
From:   Sunny Luo <sunny.luo@...ogic.com>
To:     Neil Armstrong <narmstrong@...libre.com>,
        Mark Brown <broonie@...nel.org>
CC:     Yixun Lan <yixun.lan@...ogic.com>,
        Jerome Brunet <jbrunet@...libre.com>,
        Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>,
        Jianxin Pan <jianxin.pan@...ogic.com>,
        Xingyu Chen <xingyu.chen@...ogic.com>,
        <linux-spi@...r.kernel.org>, <linux-amlogic@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 3/3] spi: meson-axg: add a linear clock divider support

Hi Neil,

On 2018/12/13 16:55, Neil Armstrong wrote:
> Hi Sunny,
> 
> On 13/12/2018 09:39, Sunny Luo wrote:
>> The SPICC controller in Meson-AXG SoC is capable of using
>> a linear clock divider to reach a much fine tuned range of clocks,
>> while the old controller only use a power of two clock divider,
>> result at a more coarse clock range.
> 
> This patch should definitely go before patch 1.
Would you please show the reason?
> 
>>  
>> +	/* Set master mode and enable controller */
>> +	writel_relaxed(SPICC_ENABLE | SPICC_MODE_MASTER,
>> +		       spicc->base + SPICC_CONREG);
> 
> Please remove it from meson_spicc_prepare_message() now.
>
Yes, I moved it here and forgot remove it at prepare_message().