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Message-ID: <154476557998.19322.11977618193120872801@swboyd.mtv.corp.google.com>
Date: Thu, 13 Dec 2018 21:32:59 -0800
From: Stephen Boyd <swboyd@...omium.org>
To: "Rafael J. Wysocki" <rjw@...ysocki.net>,
Taniya Das <tdas@...eaurora.org>,
Viresh Kumar <viresh.kumar@...aro.org>,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Cc: Rajendra Nayak <rnayak@...eaurora.org>, devicetree@...r.kernel.org,
robh@...nel.org, skannan@...eaurora.org,
linux-arm-msm@...r.kernel.org, evgreen@...gle.com,
Matthias Kaehlcke <mka@...omium.org>,
Taniya Das <tdas@...eaurora.org>
Subject: Re: [PATCH v13 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings
Quoting Taniya Das (2018-12-13 20:10:23)
> Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
> SoCs. This is required for managing the cpu frequency transitions which are
> controlled by the hardware engine.
>
> Signed-off-by: Taniya Das <tdas@...eaurora.org>
> ---
Reviewed-by: Stephen Boyd <swboyd@...omium.org>
except one question below for Rob.
> diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
> new file mode 100644
> index 0000000..33856947
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt
> @@ -0,0 +1,172 @@
> +Qualcomm Technologies, Inc. CPUFREQ Bindings
> +
> +CPUFREQ HW is a hardware engine used by some Qualcomm Technologies, Inc. (QTI)
> +SoCs to manage frequency in hardware. It is capable of controlling frequency
> +for multiple clusters.
> +
> +Properties:
> +- compatible
> + Usage: required
> + Value type: <string>
> + Definition: must be "qcom,cpufreq-hw".
> +
> +- clocks
> + Usage: required
> + Value type: <phandle> From common clock binding.
> + Definition: clock handle for XO clock and GPLL0 clock.
> +
> +- clock-names
> + Usage: required
> + Value type: <string> From common clock binding.
> + Definition: must be "xo", "alternate".
> +
> +- reg
> + Usage: required
> + Value type: <prop-encoded-array>
> + Definition: Addresses and sizes for the memory of the HW bases in
> + each frequency domain.
> +- reg-names
> + Usage: Optional
> + Value type: <string>
> + Definition: Frequency domain name i.e.
> + "freq-domain0", "freq-domain1".
> +
> +- #freq-domain-cells:
I still wonder if this should be #qcom,freq-domain-cells, but if Rob is
OK I won't complain.
> + Usage: required.
Nitpick: Weird full-stop here ^
> + Definition: Number of cells in a freqency domain specifier.
> +
> +* Property qcom,freq-domain
> +Devices supporting freq-domain must set their "qcom,freq-domain" property with
> +phandle to a cpufreq_hw followed by the Domain ID(0/1) in the CPU DT node.
> +
> +
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