[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1544778613-24279-6-git-send-email-fabrizio.castro@bp.renesas.com>
Date: Fri, 14 Dec 2018 09:10:09 +0000
From: Fabrizio Castro <fabrizio.castro@...renesas.com>
To: Rob Herring <robh+dt@...nel.org>,
Simon Horman <horms@...ge.net.au>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Mark Rutland <mark.rutland@....com>
Cc: Fabrizio Castro <fabrizio.castro@...renesas.com>,
Magnus Damm <magnus.damm@...il.com>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>
Subject: [PATCH 5/9] arm64: dts: renesas: r8a774c0: Add PFC support
Add PFC support to the RZ/G2E (a.k.a. r8a774c0) SoC specific
device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro@...renesas.com>
---
arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
index 895f407..afb4751 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi
@@ -105,6 +105,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller@...60000 {
+ compatible = "renesas,pfc-r8a774c0";
+ reg = <0 0xe6060000 0 0x508>;
+ };
+
cpg: clock-controller@...50000 {
compatible = "renesas,r8a774c0-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.7.4
Powered by blists - more mailing lists