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Message-ID: <VI1PR04MB44313466C33A7BAD7167D4EEEDA10@VI1PR04MB4431.eurprd04.prod.outlook.com>
Date:   Fri, 14 Dec 2018 10:30:15 +0000
From:   Peng Ma <peng.ma@....com>
To:     Peng Ma <peng.ma@....com>, "vkoul@...nel.org" <vkoul@...nel.org>,
        "shawnguo@...nel.org" <shawnguo@...nel.org>
CC:     Leo Li <leoyang.li@....com>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Wen He <wen.he_1@....com>
Subject: RE: [PATCH 3/3] arm64: dts: ls1046a: add qdma device tree nodes

Hi shawnguo,

I send this series patch to http://patchwork.ozlabs.org/project/devicetree-bindings/list/
But I did not find patchs on devicetree patchwork, could I send patchs again.
Thanks.

Best Regards, 
Peng
>-----Original Message-----
>From: Peng Ma <peng.ma@....com>
>Sent: 2018年12月6日 19:18
>To: vkoul@...nel.org; shawnguo@...nel.org
>Cc: Leo Li <leoyang.li@....com>; robh+dt@...nel.org;
>mark.rutland@....com; linux-arm-kernel@...ts.infradead.org;
>devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; Peng Ma
><peng.ma@....com>; Wen He <wen.he_1@....com>
>Subject: [PATCH 3/3] arm64: dts: ls1046a: add qdma device tree nodes
>
>add the qDMA device tree nodes for LS1046A devices.
>
>Signed-off-by: Wen He <wen.he_1@....com>
>Signed-off-by: Peng Ma <peng.ma@....com>
>---
>change in v12:
>	- used GIC_SPI and IRQ_TYPE_LEVEL_HIGH to instead immediate
>	number
>
> arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |   21
>+++++++++++++++++++++
> 1 files changed, 21 insertions(+), 0 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>index 51cbd50..8fcce79 100644
>--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
>@@ -704,6 +704,27 @@
> 					<0000 0 0 4 &gic GIC_SPI 154
>IRQ_TYPE_LEVEL_HIGH>;
> 		};
>
>+		qdma: dma-controller@...0000 {
>+			compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
>+			reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
>+			      <0x0 0x8390000 0x0 0x10000>, /* Status regs */
>+			      <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
>+			interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
>+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
>+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
>+				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
>+				     <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
>+			interrupt-names = "qdma-error", "qdma-queue0",
>+				"qdma-queue1", "qdma-queue2", "qdma-queue3";
>+			dma-channels = <8>;
>+			block-number = <1>;
>+			block-offset = <0x10000>;
>+			fsl,dma-queues = <2>;
>+			status-sizes = <64>;
>+			queue-sizes = <64 64>;
>+			big-endian;
>+		};
>+
> 	};
>
> 	reserved-memory {
>--
>1.7.1

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