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Message-Id: <20181216230916.22982-3-andrew.smirnov@gmail.com>
Date:   Sun, 16 Dec 2018 15:09:15 -0800
From:   Andrey Smirnov <andrew.smirnov@...il.com>
To:     Lorenzo Pieralisi <lorenzo.pieralisi@....com>
Cc:     Andrey Smirnov <andrew.smirnov@...il.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Fabio Estevam <fabio.estevam@....com>,
        Chris Healy <cphealy@...il.com>,
        Lucas Stach <l.stach@...gutronix.de>,
        Leonard Crestez <leonard.crestez@....com>,
        "A.s. Dong" <aisheng.dong@....com>,
        Richard Zhu <hongxing.zhu@....com>, linux-imx@....com,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-pci@...r.kernel.org
Subject: [PATCH 2/3] PCI: imx6: Invert checks in imx6_pcie_reset_phy() and imx6_setup_phy_mpll()

In order to avoid having potentially ever growing list of variants
that don't support methods implemented in imx6_pcie_reset_phy() and
imx6_setup_phy_mpll(), change logical checks in the to check for SoC's
that _do_ support what they implement. While at it, share the code via
a small helper function.

Cc: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Fabio Estevam <fabio.estevam@....com>
Cc: Chris Healy <cphealy@...il.com>
Cc: Lucas Stach <l.stach@...gutronix.de>
Cc: Leonard Crestez <leonard.crestez@....com>
Cc: "A.s. Dong" <aisheng.dong@....com>
Cc: Richard Zhu <hongxing.zhu@....com>
Cc: linux-imx@....com
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-pci@...r.kernel.org
Suggested-by: Bjorn Helgaas <helgaas@...nel.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@...il.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 4b7f638b8aff..59658577e81d 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -256,12 +256,18 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
 	return 0;
 }
 
+static bool imx6_pcie_has_imx6_phy(struct imx6_pcie *imx6_pcie)
+{
+	return imx6_pcie->variant == IMX6Q ||
+	       imx6_pcie->variant == IMX6SX ||
+	       imx6_pcie->variant == IMX6QP;
+}
+
 static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
 {
 	u32 tmp;
 
-	if (imx6_pcie->variant == IMX7D ||
-	    imx6_pcie->variant == IMX8MQ)
+	if (!imx6_pcie_has_imx6_phy(imx6_pcie))
 		return;
 
 	pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp);
@@ -637,8 +643,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
 	int mult, div;
 	u32 val;
 
-	if (imx6_pcie->variant == IMX7D ||
-	    imx6_pcie->variant == IMX8MQ)
+	if (!imx6_pcie_has_imx6_phy(imx6_pcie))
 		return 0;
 
 	switch (phy_rate) {
-- 
2.19.1

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