linux-kernel - Re: [PATCH] kvm: x86: Add AMD's EX

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Date:   Tue, 18 Dec 2018 22:10:08 +0100
From:   Paolo Bonzini <pbonzini@...hat.com>
To:     Eduardo Habkost <ehabkost@...hat.com>, kvm@...r.kernel.org
Cc:     Brijesh Singh <brijesh.singh@....com>,
        Tom Lendacky <Thomas.Lendacky@....com>,
        Babu Moger <babu.moger@....com>, linux-kernel@...r.kernel.org,
        Radim Krčmář <rkrcmar@...hat.com>
Subject: Re: [PATCH] kvm: x86: Add AMD's EX_CFG to the list of ignored MSRs

On 18/12/18 01:34, Eduardo Habkost wrote:
> Some guests OSes (including Windows 10) write to MSR 0xc001102c
> on some cases (possibly while trying to apply a CPU errata).
> Make KVM ignore reads and writes to that MSR, so the guest won't
> crash.
> 
> The MSR is documented as "Execution Unit Configuration (EX_CFG)",
> at AMD's "BIOS and Kernel Developer's Guide (BKDG) for AMD Family
> 15h Models 00h-0Fh Processors".
> 
> Signed-off-by: Eduardo Habkost <ehabkost@...hat.com>
> ---
>  arch/x86/include/asm/msr-index.h | 1 +
>  arch/x86/kvm/x86.c               | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index c8f73efb4ece..9e39cc8bd989 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -390,6 +390,7 @@
>  #define MSR_F15H_NB_PERF_CTR		0xc0010241
>  #define MSR_F15H_PTSC			0xc0010280
>  #define MSR_F15H_IC_CFG			0xc0011021
> +#define MSR_F15H_EX_CFG			0xc001102c
>  
>  /* Fam 10h MSRs */
>  #define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 9cbce3ec84ec..69f822165fe2 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -2429,6 +2429,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_AMD64_PATCH_LOADER:
>  	case MSR_AMD64_BU_CFG2:
>  	case MSR_AMD64_DC_CFG:
> +	case MSR_F15H_EX_CFG:
>  		break;
>  
>  	case MSR_IA32_UCODE_REV:
> @@ -2724,6 +2725,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>  	case MSR_AMD64_BU_CFG2:
>  	case MSR_IA32_PERF_CTL:
>  	case MSR_AMD64_DC_CFG:
> +	case MSR_F15H_EX_CFG:
>  		msr_info->data = 0;
>  		break;
>  	case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
> 

Queued, thanks.

Paolo