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Message-ID: <365dfd8e7160c0c3e5a113dbaa88be68@codeaurora.org>
Date:   Wed, 19 Dec 2018 12:34:55 +0530
From:   Sibi Sankar <sibis@...eaurora.org>
To:     Rob Herring <robh@...nel.org>
Cc:     bjorn.andersson@...aro.org, andy.gross@...aro.org,
        david.brown@...aro.org, dianders@...omium.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        tsoni@...eaurora.org, clew@...eaurora.org, akdwived@...eaurora.org,
        mark.rutland@....com, linux-remoteproc@...r.kernel.org,
        evgreen@...omium.org, briannorris@...omium.org,
        linux-remoteproc-owner@...r.kernel.org
Subject: Re: [PATCH v2 2/7] dt-bindings: remoteproc: qcom: Add clock bindings
 for Q6V5

Hi Rob,
Thanks for the review!

On 2018-12-18 22:57, Rob Herring wrote:
> On Mon, Dec 17, 2018 at 03:37:19PM +0530, Sibi Sankar wrote:
>> Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
>> 
>> Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
>> ---
>>  .../devicetree/bindings/remoteproc/qcom,q6v5.txt       | 10 
>> +++++++---
>>  1 file changed, 7 insertions(+), 3 deletions(-)
>> 
>> diff --git 
>> a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt 
>> b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> index 9ff5b0309417..780adc043b37 100644
>> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
>> @@ -39,13 +39,17 @@ on the Qualcomm Hexagon core.
>>  - clocks:
>>  	Usage: required
>>  	Value type: <phandle>
>> -	Definition: reference to the iface, bus and mem clocks to be held on
>> -		    behalf of the booting of the Hexagon core
>> +	Definition: reference to the list of 4 clocks for the modem 
>> sub-system
>> +		    reference to the list of 8 clocks for the modem sub-system
>> +		    on SDM845 SoCs
>> 
>>  - clock-names:
>>  	Usage: required
>>  	Value type: <stringlist>
>> -	Definition: must be "iface", "bus", "mem"
>> +	Definition: must be "iface", "bus", "mem", "xo" for the modem 
>> sub-system
>> +		    must be "iface", "bus", "mem", "gpll0_mss", "snoc_axi",
>> +		    "mnoc_axi", "prng", "xo" for the modem sub-system on SDM845
>> +		    SoCs
> 
> This seems to me a list of all clocks you need enabled, not what clocks
> actually go to the modem. Specifically, shouldn't the *noc_axi clocks 
> be
> managed by the interconnect driver?

clocks = ...,
        <&gcc GCC_MSS_SNOC_AXI_CLK>,
        <&gcc GCC_MSS_MFAB_AXIS_CLK>,
          ...;
clock-names = ..., "snoc_axi", "mnoc_axi",...;

snoc_axi and mnoc_axi maps to above GCC clks and
both of them fall under the MSS functional group

> 
> Rob

-- 
-- Sibi Sankar --
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project.

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