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Message-ID: <1545214186-16987-6-git-send-email-yogeshnarayan.gaur@nxp.com>
Date: Wed, 19 Dec 2018 10:12:14 +0000
From: Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>
To: "linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
"boris.brezillon@...tlin.com" <boris.brezillon@...tlin.com>,
"broonie@...nel.org" <broonie@...nel.org>,
"marek.vasut@...il.com" <marek.vasut@...il.com>,
"vigneshr@...com" <vigneshr@...com>,
"linux-spi@...r.kernel.org" <linux-spi@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
CC: "tudor.ambarus@...rochip.com" <tudor.ambarus@...rochip.com>,
"robh@...nel.org" <robh@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"computersforpeace@...il.com" <computersforpeace@...il.com>,
"frieder.schrempf@...eet.de" <frieder.schrempf@...eet.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>
Subject: [PATCH v6 5/7] mtd: m25p80: add support of octal mode I/O transfer
Add support for octal mode I/O data transfer based on the controller (spi)
mode.
Assign hw-capability mask bits for octal transfer.
Signed-off-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>
---
Changes for v6:
- Correct S-o-b tag with full author name as 'Yogesh Narayan Gaur'.
Changes for v5:
- Modified string 'octo' with 'octal'.
Changes for v4:
- None
Changes for v3:
- Modified string 'octal' with 'octo'.
Changes for v2:
- Incorporated review comments of Boris.
drivers/mtd/devices/m25p80.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index c4a1d04..651bab6 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -195,7 +195,14 @@ static int m25p_probe(struct spi_mem *spimem)
spi_mem_set_drvdata(spimem, flash);
flash->spimem = spimem;
- if (spi->mode & SPI_RX_QUAD) {
+ if (spi->mode & SPI_RX_OCTAL) {
+ hwcaps.mask |= SNOR_HWCAPS_READ_1_1_8;
+
+ if (spi->mode & SPI_TX_OCTAL)
+ hwcaps.mask |= (SNOR_HWCAPS_READ_1_8_8 |
+ SNOR_HWCAPS_PP_1_1_8 |
+ SNOR_HWCAPS_PP_1_8_8);
+ } else if (spi->mode & SPI_RX_QUAD) {
hwcaps.mask |= SNOR_HWCAPS_READ_1_1_4;
if (spi->mode & SPI_TX_QUAD)
--
2.7.4
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