linux-kernel - [PATCH 0/7] qcom: support wakeup capable GPIOs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 19 Dec 2018 15:10:58 -0700
From:   Lina Iyer <ilina@...eaurora.org>
To:     sboyd@...nel.org, evgreen@...omium.org, marc.zyngier@....com
Cc:     linux-kernel@...r.kernel.org, rplsssn@...eaurora.org,
        linux-arm-msm@...r.kernel.org, thierry.reding@...il.com,
        bjorn.andersson@...aro.org, Lina Iyer <ilina@...eaurora.org>
Subject: [PATCH 0/7] qcom: support wakeup capable GPIOs

Hi all,

This set of patches adds support for wakeup capable GPIOs. After discussions in
[1], this patches implement the recommendations suggested by Stephen.

The gist of the approach is that GPIO is setup in hierarchy with a
wakeup-parent irqchip. The key difference to [1] is that the TLMM GPIO driver
could mask the TLMM GPIO if requested by the wakeup-parent irqchip, thereby
supporing both MPM and PDC based architectures for QCOM SoCs. The work uses
Stephen's code pretty much as-is from [1].

Stephen,
I moved the GPIO-PDC pin map to a separate file to allow the follow-on chips to
add their SoC specific maps in the data file and avoid clobbering the PDC
driver.

Thanks to Thierry's patches to add support for hierarchy in GPIO framework. It
has been included here for completeness.

Kindly review these patches and let me know your commennts.

Thanks,
Lina

[1]. https://lkml.org/lkml/2018/11/21/168

Lina Iyer (5):
  irqdomain: add bus token DOMAIN_BUS_WAKEUP
  dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO
  drivers: pinctrl: msm: setup GPIO irqchip hierarchy
  arm64: dts: msm: add PDC device bindings for sdm845
  arm64: dts: msm: setup PDC as wakeup parent for GPIOs for SDM845

Stephen Boyd (1):
  drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs

Thierry Reding (1):
  gpio: Add support for hierarchical IRQ domains

 .../bindings/pinctrl/qcom,sdm845-pinctrl.txt  |   7 +-
 arch/arm64/boot/dts/qcom/sdm845.dtsi          |  10 ++
 drivers/gpio/gpiolib.c                        |  15 +-
 drivers/irqchip/Makefile                      |   2 +-
 drivers/irqchip/qcom-pdc-data.c               |  94 ++++++++++++
 drivers/irqchip/qcom-pdc.c                    | 111 ++++++++++++--
 drivers/irqchip/qcom-pdc.h                    |  24 ++++
 drivers/pinctrl/qcom/pinctrl-msm.c            | 136 ++++++++++++++++--
 include/linux/gpio/driver.h                   |   6 +
 include/linux/irqdomain.h                     |   1 +
 include/linux/soc/qcom/irq.h                  |  23 +++
 11 files changed, 401 insertions(+), 28 deletions(-)
 create mode 100644 drivers/irqchip/qcom-pdc-data.c
 create mode 100644 drivers/irqchip/qcom-pdc.h
 create mode 100644 include/linux/soc/qcom/irq.h

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project