linux-kernel - [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

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Message-Id: <20181220173026.3857-3-jcrouse@codeaurora.org>
Date:   Thu, 20 Dec 2018 10:30:25 -0700
From:   Jordan Crouse <jcrouse@...eaurora.org>
To:     freedreno@...ts.freedesktop.org
Cc:     linux-arm-msm@...r.kernel.org, dianders@...omium.org,
        georgi.djakov@...aro.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        Rob Herring <robh+dt@...nel.org>,
        Rob Clark <robdclark@...il.com>,
        David Airlie <airlied@...ux.ie>,
        Mark Rutland <mark.rutland@....com>
Subject: [PATCH v3 2/3] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse <jcrouse@...eaurora.org>
---

 Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 9c89f4fdb8ca..5b04393dcb15 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -20,6 +20,8 @@ Required properties:
    - qcom,adreno-630.2
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
 - qcom,gmu: For GMU attached devices a phandle to the GMU device that will
   control the power for the GPU. Applicable targets:
     - qcom,adreno-630.2
@@ -68,6 +70,8 @@ Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
 		qcom,gmu = <&gmu>;
 	};
 };
-- 
2.18.0