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Date: Thu, 20 Dec 2018 18:31:34 +0100 From: Vitaly Kuznetsov <vkuznets@...hat.com> To: Borislav Petkov <bp@...en8.de>, Reinette Chatre <reinette.chatre@...el.com>, Babu Moger <Babu.Moger@....com> Cc: x86@...nel.org, linux-kernel@...r.kernel.org, Fenghua Yu <fenghua.yu@...el.com>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>, Jan H . Schönherr <jschoenh@...zon.de>, David Duncan <davdunc@...zon.com> Subject: Re: [PATCH] x86/intel_rdt: use rdmsr_safe() to workaround AWS host issue Borislav Petkov <bp@...en8.de> writes: > On Thu, Dec 20, 2018 at 02:40:46PM +0100, Vitaly Kuznetsov wrote: >> It was found that AWS x1 instances (Xen-based) lack xen.git commit >> 1f1d183d4900 (x86/HVM: don't give the wrong impression of WRMSR succeeding) >> and because of that the wrmsr_safe() check in cache_alloc_hsw_probe() >> doesn't help: the consequent rdmsr() blows up with >> >> unchecked MSR access error: RDMSR from 0xc90 at rIP: >> 0xffffffff88c5bba3 (native_read_msr+0x3/0x30) >> >> The issue should definitely get fixed on AWS side. We can, however, simply >> workaround this in Linux and live happily after. >> >> Signed-off-by: Vitaly Kuznetsov <vkuznets@...hat.com> >> --- >> arch/x86/kernel/cpu/intel_rdt.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c >> index 44272b7107ad..0acee6cd07a8 100644 >> --- a/arch/x86/kernel/cpu/intel_rdt.c >> +++ b/arch/x86/kernel/cpu/intel_rdt.c >> @@ -213,7 +213,8 @@ static inline void cache_alloc_hsw_probe(void) >> >> if (wrmsr_safe(IA32_L3_CBM_BASE, max_cbm, 0)) >> return; >> - rdmsr(IA32_L3_CBM_BASE, l, h); >> + if (rdmsr_safe(IA32_L3_CBM_BASE, &l, &h)) >> + return; >> >> /* If all the bits were set in MSR, return success */ >> if (l != max_cbm) >> -- > > Does the below hunk work too? > Yes, it does, thanks! -- Vitaly
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