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Message-ID: <201812221357.HUtdYMbm%fengguang.wu@intel.com>
Date: Sat, 22 Dec 2018 13:42:27 +0800
From: kbuild test robot <lkp@...el.com>
To: Andrzej Hajda <a.hajda@...sung.com>
Cc: kbuild-all@...org, Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Andrzej Hajda <a.hajda@...sung.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Heiko Stuebner <heiko@...ech.de>,
"Rafael J. Wysocki" <rafael@...nel.org>,
linux-kernel@...r.kernel.org,
Javier Martinez Canillas <javierm@...hat.com>,
linux-arm-kernel@...ts.infradead.org, andy.shevchenko@...il.com,
Mark Brown <broonie@...nel.org>,
Russell King - ARM Linux <linux@...linux.org.uk>
Subject: Re: [PATCH] PCI: pcie-rockchip: use probe_err helpers instead of
open coding
Hi Andrzej,
I love your patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on v4.20-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/Andrzej-Hajda/PCI-pcie-rockchip-use-probe_err-helpers-instead-of-open-coding/20181222-044838
base: https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git for-next
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 8.1.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=8.1.0 make.cross ARCH=ia64
All errors (new ones prefixed by >>):
drivers/pci/controller/pcie-rockchip.c: In function 'rockchip_pcie_parse_dt':
>> drivers/pci/controller/pcie-rockchip.c:73:10: error: implicit declaration of function 'probe_err_ptr'; did you mean 'probe_irq_off'? [-Werror=implicit-function-declaration]
return probe_err_ptr(dev, rockchip->core_rst,
^~~~~~~~~~~~~
probe_irq_off
cc1: some warnings being treated as errors
vim +73 drivers/pci/controller/pcie-rockchip.c
24
25 int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
26 {
27 struct device *dev = rockchip->dev;
28 struct platform_device *pdev = to_platform_device(dev);
29 struct device_node *node = dev->of_node;
30 struct resource *regs;
31 int err;
32
33 if (rockchip->is_rc) {
34 regs = platform_get_resource_byname(pdev,
35 IORESOURCE_MEM,
36 "axi-base");
37 rockchip->reg_base = devm_pci_remap_cfg_resource(dev, regs);
38 if (IS_ERR(rockchip->reg_base))
39 return PTR_ERR(rockchip->reg_base);
40 } else {
41 rockchip->mem_res =
42 platform_get_resource_byname(pdev, IORESOURCE_MEM,
43 "mem-base");
44 if (!rockchip->mem_res)
45 return -EINVAL;
46 }
47
48 regs = platform_get_resource_byname(pdev, IORESOURCE_MEM,
49 "apb-base");
50 rockchip->apb_base = devm_ioremap_resource(dev, regs);
51 if (IS_ERR(rockchip->apb_base))
52 return PTR_ERR(rockchip->apb_base);
53
54 err = rockchip_pcie_get_phys(rockchip);
55 if (err)
56 return err;
57
58 rockchip->lanes = 1;
59 err = of_property_read_u32(node, "num-lanes", &rockchip->lanes);
60 if (!err && (rockchip->lanes == 0 ||
61 rockchip->lanes == 3 ||
62 rockchip->lanes > 4)) {
63 dev_warn(dev, "invalid num-lanes, default to use one lane\n");
64 rockchip->lanes = 1;
65 }
66
67 rockchip->link_gen = of_pci_get_max_link_speed(node);
68 if (rockchip->link_gen < 0 || rockchip->link_gen > 2)
69 rockchip->link_gen = 2;
70
71 rockchip->core_rst = devm_reset_control_get_exclusive(dev, "core");
72 if (IS_ERR(rockchip->core_rst))
> 73 return probe_err_ptr(dev, rockchip->core_rst,
74 "missing core reset property in node\n");
75
76 rockchip->mgmt_rst = devm_reset_control_get_exclusive(dev, "mgmt");
77 if (IS_ERR(rockchip->mgmt_rst))
78 return probe_err_ptr(dev, rockchip->mgmt_rst,
79 "missing mgmt reset property in node\n");
80
81 rockchip->mgmt_sticky_rst = devm_reset_control_get_exclusive(dev,
82 "mgmt-sticky");
83 if (IS_ERR(rockchip->mgmt_sticky_rst))
84 return probe_err_ptr(dev, rockchip->mgmt_sticky_rst,
85 "missing mgmt-sticky reset property in node\n");
86
87 rockchip->pipe_rst = devm_reset_control_get_exclusive(dev, "pipe");
88 if (IS_ERR(rockchip->pipe_rst))
89 return probe_err_ptr(dev, rockchip->pipe_rst,
90 "missing pipe reset property in node\n");
91
92 rockchip->pm_rst = devm_reset_control_get_exclusive(dev, "pm");
93 if (IS_ERR(rockchip->pm_rst))
94 return probe_err_ptr(dev, rockchip->pm_rst,
95 "missing pm reset property in node\n");
96
97 rockchip->pclk_rst = devm_reset_control_get_exclusive(dev, "pclk");
98 if (IS_ERR(rockchip->pclk_rst))
99 return probe_err_ptr(dev, rockchip->pclk_rst,
100 "missing pclk reset property in node\n");
101
102 rockchip->aclk_rst = devm_reset_control_get_exclusive(dev, "aclk");
103 if (IS_ERR(rockchip->aclk_rst))
104 return probe_err_ptr(dev, rockchip->aclk_rst,
105 "missing aclk reset property in node\n");
106
107 if (rockchip->is_rc) {
108 rockchip->ep_gpio = devm_gpiod_get(dev, "ep", GPIOD_OUT_HIGH);
109 if (IS_ERR(rockchip->ep_gpio))
110 return probe_err_ptr(dev, rockchip->ep_gpio,
111 "missing ep-gpios property in node\n");
112 }
113
114 rockchip->aclk_pcie = devm_clk_get(dev, "aclk");
115 if (IS_ERR(rockchip->aclk_pcie))
116 return probe_err_ptr(dev, rockchip->aclk_pcie,
117 "aclk clock not found\n");
118
119 rockchip->aclk_perf_pcie = devm_clk_get(dev, "aclk-perf");
120 if (IS_ERR(rockchip->aclk_perf_pcie))
121 return probe_err_ptr(dev, rockchip->aclk_perf_pcie,
122 "aclk_perf clock not found\n");
123
124 rockchip->hclk_pcie = devm_clk_get(dev, "hclk");
125 if (IS_ERR(rockchip->hclk_pcie))
126 return probe_err_ptr(dev, rockchip->hclk_pcie,
127 "hclk clock not found\n");
128
129 rockchip->clk_pcie_pm = devm_clk_get(dev, "pm");
130 if (IS_ERR(rockchip->clk_pcie_pm))
131 return probe_err_ptr(dev, rockchip->clk_pcie_pm,
132 "pm clock not found\n");
133
134 return 0;
135 }
136 EXPORT_SYMBOL_GPL(rockchip_pcie_parse_dt);
137
---
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