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Message-ID: <20181227212105.GA19897@bogus>
Date:   Thu, 27 Dec 2018 15:21:05 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sibi Sankar <sibis@...eaurora.org>
Cc:     bjorn.andersson@...aro.org, andy.gross@...aro.org,
        david.brown@...aro.org, dianders@...omium.org,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        tsoni@...eaurora.org, clew@...eaurora.org, akdwived@...eaurora.org,
        mark.rutland@....com, linux-remoteproc@...r.kernel.org,
        evgreen@...omium.org, briannorris@...omium.org,
        sricharan@...eaurora.org
Subject: Re: [PATCH v3 2/8] dt-bindings: remoteproc: qcom: Add missing clocks
 for SDM845

On Wed, Dec 26, 2018 at 06:22:23PM +0530, Sibi Sankar wrote:
> Add missing clock bindings for Q6V5 MSS on SDM845 SoCs.
> 
> Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL
> binding for SDM845")
> 
> Signed-off-by: Sibi Sankar <sibis@...eaurora.org>
> ---
> 
> v3:
>   * Fixup dt-binding documentation as suggested by Doug
> 
>  .../devicetree/bindings/remoteproc/qcom,q6v5.txt   | 14 +++++++++++---
>  1 file changed, 11 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> index 9ff5b0309417..20dd19f9ed99 100644
> --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
> @@ -39,13 +39,21 @@ on the Qualcomm Hexagon core.
>  - clocks:
>  	Usage: required
>  	Value type: <phandle>
> -	Definition: reference to the iface, bus and mem clocks to be held on
> -		    behalf of the booting of the Hexagon core
> +	Definition: reference to the clocks that match clock-names
>  
>  - clock-names:
>  	Usage: required
>  	Value type: <stringlist>
> -	Definition: must be "iface", "bus", "mem"
> +	Definition: The clocks needed depend on the compatible string:
> +	qcom,ipq8074-wcss-pil:
> +		    no clock names required
> +	qcom,q6v5-pil:
> +	qcom,msm8916-mss-pil:
> +	qcom,msm8974-mss-pil:
> +		    must be "iface", "bus", "mem", "xo"
> +	qcom,sdm845-mss-pil:
> +		    must be "xo", "prng", "iface", "bus", "mem", "gpll0_mss",
> +		    "snoc_axi", "mnoc_axi"

Please keep the same order for the 4 clocks which are the same.

Rob

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