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Message-Id: <20181227215020.9803-2-martin.blumenstingl@googlemail.com>
Date: Thu, 27 Dec 2018 22:50:19 +0100
From: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To: linux-amlogic@...ts.infradead.org, devicetree@...r.kernel.org,
linux-iio@...r.kernel.org, jic23@...nel.org, lars@...afoo.de,
pmeerw@...erw.net, robh+dt@...nel.org, mark.rutland@....com
Cc: balbes-150@...dex.ru, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>
Subject: [PATCH 1/2] dt-bindings: iio: adc: meson-saradc: update temperature sensor support
Meson8b and Meson8m2 use a 5-bit wide TSC (temperature sensor
coefficient). The SAR ADC registers however can only store (the lower)
4 bits. The fifth (upper-most) bit is stored inside the
MESON_HHI_DPLL_TOP_0[9] register from the HHI register area.
This adds a syscon property to the HHI register area so a driver can
fetch the HHI register map and store the fifth TSC bit in there.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>
---
.../devicetree/bindings/iio/adc/amlogic,meson-saradc.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
index 325090e43ce6..75c775954102 100644
--- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt
@@ -23,6 +23,10 @@ Required properties:
- #io-channel-cells: must be 1, see ../iio-bindings.txt
Optional properties:
+- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit
+ of the TSC (temperature sensor coefficient) on
+ Meson8b and Meson8m2 (which used to calibrate the
+ temperature sensor)
- nvmem-cells: phandle to the temperature_calib eFuse cells
- nvmem-cell-names: if present (to enable the temperature sensor
calibration) this must contain "temperature_calib"
--
2.20.1
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