linux-kernel - RE: [PATCH V2 1/3] dt-bindings: mmc: tegra: Add pinctrl for pad drive strength config

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Message-ID: <BN7PR12MB2836C77E851E7AC4BCD38BF0C2B00@BN7PR12MB2836.namprd12.prod.outlook.com>
Date:   Sat, 29 Dec 2018 00:08:02 +0000
From:   Sowjanya Komatineni <skomatineni@...dia.com>
To:     Rob Herring <robh@...nel.org>
CC:     "mark.rutland@....com" <mark.rutland@....com>,
        Mikko Perttunen <mperttunen@...dia.com>,
        "thierry.reding@...il.com" <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        "adrian.hunter@...el.com" <adrian.hunter@...el.com>,
        "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
        Preetham Chandru <pchandru@...dia.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-tegra@...r.kernel.org" <linux-tegra@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>
Subject: RE: [PATCH V2 1/3] dt-bindings: mmc: tegra: Add pinctrl for pad drive
 strength config

Hi Rob,

>> Add pinctrl for 3V3 and 1V8 pad drive strength configuration for
>> Tegra210 sdmmc which has pad configuration registers in the pinmux 
>> reigster domain.
>
> typo
>
>> 
>> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
>> ---
>>  Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 6 
>> +++++-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>> 
>> diff --git 
>> a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt 
>> b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
>> index 32b4b4e41923..2cecdc71d94c 100644
>> --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
>> +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
>> @@ -39,12 +39,16 @@ sdhci@...00200 {
>>  	bus-width = <8>;
>>  };
>>  
>> -Optional properties for Tegra210 and Tegra186:
>> +Optional properties for Tegra210, Tegra186 and Tegra194:
>
>Adding Tegra194, but this patch concerns Tegra210...
Yes this is mainly part of Tegra210 Patch but pinctrls sdmmc-1v8 and sdmmc-3v3
also applies for Tegra194 and since it was not mentioned, added Tegra194 as well.
Does adding Tegra194 in this should come as separate patch?
>
>>  - pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage
>>    configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
>>    for controllers supporting multiple voltage levels. The order of names
>>    should correspond to the pin configuration states in pinctrl-0 and
>>    pinctrl-1.
>> +- pinctrl-names : "sdmmc-3v3-drv" and "sdmmc-1v8-drv" are applicable 
>> +for
>
>These are in addition to the previous values?
Yes these are additional pinctrl states for pad drive settings which are in pinmux
Domain and are applicable during calibration process.
>
>> +  Tegra210 where pad config registers are in the pinmux register 
>> + domain  for pull-up-strength and pull-down-strength values 
>> + configuration when  using pads at 3V3 and 1V8 levels.
>>  - nvidia,only-1-8-v : The presence of this property indicates that the
>>    controller operates at a 1.8 V fixed I/O voltage.
>>  - nvidia,pad-autocal-pull-up-offset-3v3,
>> --
>> 2.7.4
>> 

Thanks & Regards,
sowjanya