[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <286AC319A985734F985F78AFA26841F73DEEAFE6@shsmsx102.ccr.corp.intel.com>
Date: Sat, 29 Dec 2018 04:25:12 +0000
From: "Wang, Wei W" <wei.w.wang@...el.com>
To: 'Andi Kleen' <ak@...ux.intel.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"peterz@...radead.org" <peterz@...radead.org>,
"Liang, Kan" <kan.liang@...el.com>,
"mingo@...hat.com" <mingo@...hat.com>,
"rkrcmar@...hat.com" <rkrcmar@...hat.com>,
"Xu, Like" <like.xu@...el.com>,
"jannh@...gle.com" <jannh@...gle.com>,
"arei.gonglei@...wei.com" <arei.gonglei@...wei.com>
Subject: RE: [PATCH v4 10/10] KVM/x86/lbr: lazy save the guest lbr stack II
On Friday, December 28, 2018 4:53 AM, Andi Kleen wrote:
> Actually forgot one case.
>
> In Arch Perfmon v4 the LBR freezing is also controlled through a
> GLOBAL_CTRL bit.
> I didn't see any code handling that bit?
That GLOBAL_STATUS.LBR_FRZ bit hasn't been supported yet. I'll add that, thanks.
Best,
Wei
Powered by blists - more mailing lists