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Message-ID: <201901010407.XNjqkKul%fengguang.wu@intel.com>
Date:   Tue, 1 Jan 2019 04:12:19 +0800
From:   kbuild test robot <lkp@...el.com>
To:     Jianxin Pan <jianxin.pan@...ogic.com>
Cc:     kbuild-all@...org, Jerome Brunet <jbrunet@...libre.com>,
        Neil Armstrong <narmstrong@...libre.com>,
        Yixun Lan <yixun.lan@...ogic.com>,
        Jianxin Pan <jianxin.pan@...ogic.com>,
        Kevin Hilman <khilman@...libre.com>,
        Carlo Caione <carlo@...one.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Boris Brezillon <boris.brezillon@...tlin.com>,
        Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        Liang Yang <liang.yang@...ogic.com>,
        Jian Hu <jian.hu@...ogic.com>,
        Qiufang Dai <qiufang.dai@...ogic.com>,
        Hanjie Lin <hanjie.lin@...ogic.com>,
        Victor Wan <victor.wan@...ogic.com>, linux-clk@...r.kernel.org,
        linux-amlogic@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH RESEND v8 4/4] clk: meson: add sub MMC clock controller
 driver

Hi Yixun,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on clk/clk-next]
[also build test ERROR on next-20181224]
[cannot apply to v4.20]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jianxin-Pan/clk-meson-add-a-sub-EMMC-clock-controller-support/20181222-060947
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: i386-randconfig-s0-12301806 (attached as .config)
compiler: gcc-6 (Debian 6.4.0-9) 6.4.0 20171026
reproduce:
        # save the attached .config to linux build tree
        make ARCH=i386 

All errors (new ones prefixed by >>):

   drivers/clk/meson/mmc-clkc.o: In function `mmc_clkc_register_mux':
>> drivers/clk/meson/mmc-clkc.c:182: undefined reference to `clk_regmap_mux_ops'

vim +182 drivers/clk/meson/mmc-clkc.c

   158	
   159	static struct clk_regmap *mmc_clkc_register_mux(struct device *dev,
   160							struct regmap *map)
   161	{
   162		const char *parent_names[MUX_CLK_NUM_PARENTS];
   163		struct clk_init_data init;
   164		struct clk_regmap *mux;
   165		struct clk *clk;
   166		int i;
   167	
   168		for (i = 0; i < MUX_CLK_NUM_PARENTS; i++) {
   169			char name[8];
   170	
   171			snprintf(name, sizeof(name), "clkin%d", i);
   172			clk = devm_clk_get(dev, name);
   173			if (IS_ERR(clk)) {
   174				if (clk != ERR_PTR(-EPROBE_DEFER))
   175					dev_err(dev, "Missing clock %s\n", name);
   176				return ERR_CAST(clk);
   177			}
   178	
   179			parent_names[i] = __clk_get_name(clk);
   180		}
   181	
 > 182		init.ops = &clk_regmap_mux_ops;
   183		init.flags = CLK_SET_RATE_PARENT;
   184		init.parent_names = parent_names;
   185		init.num_parents = MUX_CLK_NUM_PARENTS;
   186	
   187		mux = mmc_clkc_register_clk(dev, map, &init, "mux", &mmc_clkc_mux_data);
   188		if (IS_ERR(mux))
   189			dev_err(dev, "Mux clock registration failed\n");
   190	
   191		return mux;
   192	}
   193	

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation

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