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Message-Id: <20190106083754.6004-5-afaerber@suse.de>
Date:   Sun,  6 Jan 2019 09:37:47 +0100
From:   Andreas Färber <afaerber@...e.de>
To:     linux-lpwan@...ts.infradead.org
Cc:     netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        Andreas Färber <afaerber@...e.de>,
        Ben Whitten <ben.whitten@...il.com>,
        "David S. Miller" <davem@...emloft.net>
Subject: [PATCH lora-next 04/11] net: lora: sx130x: Fix soft reset

The soft reset bit is volatile. As it lives in the frequently accessed
page register, refrain from marking the register as volatile and
instead bypass the cache for this one write.

Mark the cache as dirty afterwards. This does not appear to clear it,
so manually drop the whole cache. If we don't have a cache configured,
this may return -EINVAL, so guard it appropriately to aid in testing.

Cc: Ben Whitten <ben.whitten@...il.com>
Signed-off-by: Andreas Färber <afaerber@...e.de>
---
 drivers/net/lora/sx130x.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/net/lora/sx130x.c b/drivers/net/lora/sx130x.c
index 7a387d9a75a0..4ba02836a35d 100644
--- a/drivers/net/lora/sx130x.c
+++ b/drivers/net/lora/sx130x.c
@@ -182,7 +182,19 @@ static int sx130x_field_write(struct sx130x_priv *priv,
 
 static int sx130x_soft_reset(struct sx130x_priv *priv)
 {
-	return sx130x_field_write(priv, F_SOFT_RESET, 1);
+	int ret;
+
+	regcache_cache_bypass(priv->regmap, true);
+	ret = sx130x_field_write(priv, F_SOFT_RESET, 1);
+	regcache_cache_bypass(priv->regmap, false);
+	if (ret)
+		return ret;
+
+	regcache_mark_dirty(priv->regmap);
+	if (sx130x_regmap_config.cache_type != REGCACHE_NONE)
+		return regcache_drop_region(priv->regmap,
+			0, sx130x_regmap_config.max_register);
+	return 0;
 }
 
 static int sx130x_agc_ram_read(struct sx130x_priv *priv, u8 addr, unsigned int *val)
-- 
2.16.4

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