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Message-Id: <20190108102633.17482-12-eric.auger@redhat.com>
Date: Tue, 8 Jan 2019 11:26:23 +0100
From: Eric Auger <eric.auger@...hat.com>
To: eric.auger.pro@...il.com, eric.auger@...hat.com,
iommu@...ts.linux-foundation.org, linux-kernel@...r.kernel.org,
kvm@...r.kernel.org, kvmarm@...ts.cs.columbia.edu, joro@...tes.org,
alex.williamson@...hat.com, jacob.jun.pan@...ux.intel.com,
yi.l.liu@...ux.intel.com, jean-philippe.brucker@....com,
will.deacon@....com, robin.murphy@....com
Cc: kevin.tian@...el.com, ashok.raj@...el.com, marc.zyngier@....com,
christoffer.dall@....com, peter.maydell@...aro.org
Subject: [RFC v3 11/21] iommu/smmuv3: Implement cache_invalidate
Implement IOMMU_INV_TYPE_TLB invalidations. When
nr_pages is null we interpret this as a context
invalidation.
Signed-off-by: Eric Auger <eric.auger@...hat.com>
---
The user API needs to be refined to discriminate context
invalidations from NH_VA invalidations. Also the leaf attribute
is not yet properly handled.
v2 -> v3:
- replace __arm_smmu_tlb_sync by arm_smmu_cmdq_issue_sync
v1 -> v2:
- properly pass the asid
---
drivers/iommu/arm-smmu-v3.c | 40 +++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 0e006babc8a6..ca72e0ce92f6 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2293,6 +2293,45 @@ static int arm_smmu_set_pasid_table(struct iommu_domain *domain,
return ret;
}
+static int
+arm_smmu_cache_invalidate(struct iommu_domain *domain, struct device *dev,
+ struct iommu_cache_invalidate_info *inv_info)
+{
+ struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
+ struct arm_smmu_device *smmu = smmu_domain->smmu;
+
+ if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
+ return -EINVAL;
+
+ if (!smmu)
+ return -EINVAL;
+
+ switch (inv_info->hdr.type) {
+ case IOMMU_INV_TYPE_TLB:
+ /*
+ * TODO: On context invalidation, the userspace sets nr_pages
+ * to 0. Refine the API to add a dedicated flags and also
+ * properly handle the leaf parameter.
+ */
+ if (!inv_info->nr_pages) {
+ smmu_domain->s1_cfg.cd.asid = inv_info->arch_id;
+ arm_smmu_tlb_inv_context(smmu_domain);
+ } else {
+ size_t granule = 1 << (inv_info->size + 12);
+ size_t size = inv_info->nr_pages * granule;
+
+ smmu_domain->s1_cfg.cd.asid = inv_info->arch_id;
+ arm_smmu_tlb_inv_range_nosync(inv_info->addr, size,
+ granule, false,
+ smmu_domain);
+ arm_smmu_cmdq_issue_sync(smmu);
+ }
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
static struct iommu_ops arm_smmu_ops = {
.capable = arm_smmu_capable,
.domain_alloc = arm_smmu_domain_alloc,
@@ -2312,6 +2351,7 @@ static struct iommu_ops arm_smmu_ops = {
.get_resv_regions = arm_smmu_get_resv_regions,
.put_resv_regions = arm_smmu_put_resv_regions,
.set_pasid_table = arm_smmu_set_pasid_table,
+ .cache_invalidate = arm_smmu_cache_invalidate,
.pgsize_bitmap = -1UL, /* Restricted during device attach */
};
--
2.17.2
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