linux-kernel - Re: [PATCH v2 8/8] RISC-V: Assign hwcap only according to current cpu.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 8 Jan 2019 02:33:03 -0800
From:   Atish Patra <atish.patra@....com>
To:     "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
Cc:     Alan Kao <alankao@...estech.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Andreas Schwab <schwab@...e.de>,
        Anup Patel <anup@...infault.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Dmitriy Cherkasov <dmitriy@...-tech.org>,
        Jason Cooper <jason@...edaemon.net>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Marc Zyngier <marc.zyngier@....com>,
        Michael Clark <michaeljclark@....com>,
        Palmer Dabbelt <palmer@...ive.com>,
        Patrick Stählin <me@...ki.ch>,
        Thomas Gleixner <tglx@...utronix.de>,
        Zong Li <zongbox@...il.com>
Subject: Re: [PATCH v2 8/8] RISC-V: Assign hwcap only according to current
 cpu.

On 1/8/19 1:38 AM, Atish Patra wrote:
> Currently, we set hwcap based on first valid cpu from
> DT. This may not be correct always as that CPU might not
> be current booting cpu.
> 
> Set hwcap based on the current cpu instead of first
> valid CPU from DT.
> 
> Signed-off-by: Atish Patra <atish.patra@....com>
> ---
>   arch/riscv/kernel/cpufeature.c | 11 +++++++----
>   1 file changed, 7 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
> index a6e369ed..ed6122ff 100644
> --- a/arch/riscv/kernel/cpufeature.c
> +++ b/arch/riscv/kernel/cpufeature.c
> @@ -43,12 +43,15 @@ void riscv_fill_hwcap(void)
>   	elf_hwcap = 0;
>   
>   	/*
> -	 * We don't support running Linux on hertergenous ISA systems.  For
> -	 * now, we just check the ISA of the first "okay" processor.
> +	 * We don't support running Linux on hertergenous ISA systems.
> +	 * But first "okay" processor might not be the boot cpu.
> +	 * Check the ISA of boot cpu.
>   	 */
> -	while ((node = of_find_node_by_type(node, "cpu")))
> -		if (riscv_of_processor_hartid(node) >= 0)
> +	while ((node = of_find_node_by_type(node, "cpu"))) {
> +		if (riscv_of_processor_hartid(node) == boot_cpu_hartid)
>   			break;
> +	}
> +
>   	if (!node) {
>   		pr_warning("Unable to find \"cpu\" devicetree entry");
>   		return;
> 

Argh..Missed an include while rebasing. Following edit is required for 
non SMP config. I will fix it in v2.

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index ed6122ff..78379ea3 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -20,6 +20,7 @@
  #include <linux/of.h>
  #include <asm/processor.h>
  #include <asm/hwcap.h>
+#include <asm/smp.h>

Regards,
Atish