lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 9 Jan 2019 22:54:57 +0100
From:   Heiner Kallweit <>
To:     Tony Lindgren <>, Sekhar Nori <>
Cc:     Florian Fainelli <>,
        "David S. Miller" <>,
        Andrew Lunn <>,
        Bartosz Golaszewski <>,
        Chris Healy <>,
        Clemens Gruber <>,
        Grygorii Strashko <>,
        Ivan Khoronzhuk <>,
        Keerthy <>,
        Murali Karicheri <>,
        Rex Chang <>, Tero Kristo <>,
        WingMan Kwok <>,,,,
Subject: Re: Regression in v4.20 with net phy soft reset changes

On 09.01.2019 22:36, Tony Lindgren wrote:
> Hi,
> * Heiner Kallweit <> [190109 19:28]:
>> On 09.01.2019 20:06, Tony Lindgren wrote:
>>> Commit 6e2d85ec0559 ("net: phy: Stop with excessive soft reset") caused
>>> a regression where suspend resume cycle fails to bring up Ethernet on at
>>> least cpsw on am437x-sk-evm.
>> What kind of PHY and which PHY driver is used with this board?
>> I found one schematics of am437x where a KSZ9031RN PHY is used.
>> Is it the same on your board?
> Yes that's the phy.
>> As described in the commit message of this commit you would have
>> the option to implement the soft_reset callback in the PHY driver.
>> Can you try to add .soft_reset = genphy_soft_reset to the
>> KSZ9031 driver config in drivers/net/phy/micrel.c and check whether
>> it fixes the issue?
> Yes that seems to work based on a quick test of five suspend
> resume cycles.
> I wonder what all hardware this issue affects though?
As one of few vendors Microchip publishes errata documentation
like this one for KSZ9031RNX:
I wonder whether this is applicable for the PHY in our case and
whether the need for an extra soft reset is caused by one of
the mentioned issues.

> It's probably best that the network folks check what all
> hardare needs patching.
> For TI hardware, Sekhar and TI network folks, can you guys
> please check the various TI SoCs for multiple suspend resume
> cycles with v5.0-rc1 and patch accordingly? See also below
> for something else to check, 10 seconds to resume a phy
> seems very long to me :)
>>> Keerthy noticed this may not happen on the first resume, but usually
>>> happens after few suspend resume cycles. The most working suspend resume
>>> cycles I've seen with the commit above is three.
> ...
>>> Note that unrelated to the commit above, there may be other issues too
>>> as the cpsw phy LED seems to come on only after about five seconds with
>>> about total of 10 seconds before the Ethernet is up again.
> Regards,
> Tony

Powered by blists - more mailing lists