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Date:   Wed, 9 Jan 2019 22:14:32 +0000
From:   Chris Brandt <Chris.Brandt@...esas.com>
To:     Sergei Shtylyov <sergei.shtylyov@...entembedded.com>,
        Geert Uytterhoeven <geert@...ux-m68k.org>
CC:     Mason Yang <masonccyang@...c.com.tw>,
        Mark Brown <broonie@...nel.org>,
        Marek Vasut <marek.vasut@...il.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-spi <linux-spi@...r.kernel.org>,
        Boris Brezillon <boris.brezillon@...tlin.com>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        "juliensu@...c.com.tw" <juliensu@...c.com.tw>,
        Simon Horman <horms@...ge.net.au>,
        "zhengxunli@...c.com.tw" <zhengxunli@...c.com.tw>
Subject: RE: [PATCH v5 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller
 driver

On Wednesday, January 09, 2019, Sergei Shtylyov wrote:
> > IIRC, this hardware block is also used on RZ/A, which is 32-bit.
> 
>   I'm not seeing it in the "RZ/A1H Group, RZ/A1M Group User’s Manual:
> Hardware"
> Rev 3.00. What SoC did you have in mind?

For the RZ/A series (and RZ/T series), it is called the
"SPI Multi I/O Bus Controller" (Chapter 17)

I have no idea why it has a different name for the same hardware (and
the same pages in the manual).

The HW version in RZ/A1 does not have HyperRAM.

But the HW version in RZ/A2 is the same as what is in R-Car Gen3.

Chris

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