[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20190109150257.12602-2-wens@csie.org>
Date: Wed, 9 Jan 2019 23:02:53 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Maxime Ripard <maxime.ripard@...tlin.com>
Cc: Chen-Yu Tsai <wens@...e.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-sunxi@...glegroups.com
Subject: [PATCH 1/5] ARM: dts: sun8i: r40: Add pinmux settings for UART3 on PG pingroup
UART3 on the PG pingroup on the R40 SoC is commonly used to connect the
bluetooth controller in a WiFi+Bluetooth combo chip, with the WiFi bits
also on the PG pingroup.
This patch adds two device nodes for UART3 on PG pingroup, one for the
RX/TX pins, and one for the RTS/CTS pins. Consumers can reference either
just the RX/TX pinmux setting or both, depending on the application.
Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---
arch/arm/boot/dts/sun8i-r40.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 89762dbefe42..f1fcfa0bdce0 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -389,6 +389,16 @@
pins = "PB22", "PB23";
function = "uart0";
};
+
+ uart3_pg_pins: uart3-pg-pins {
+ pins = "PG6", "PG7";
+ function = "uart3";
+ };
+
+ uart3_rts_cts_pg_pins: uart3-rts-cts-pg-pins {
+ pins = "PG8", "PG9";
+ function = "uart3";
+ };
};
wdt: watchdog@...0c90 {
--
2.20.1
Powered by blists - more mailing lists