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Message-ID: <a3e37dde-2bab-be02-27ec-d15784bd560b@gmail.com>
Date:   Wed, 9 Jan 2019 17:54:13 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     chunhui dai <chunhui.dai@...iatek.com>,
        --to=Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, CK Hu <ck.hu@...iatek.com>
Cc:     Philipp Zabel <p.zabel@...gutronix.de>,
        David Airlie <airlied@...ux.ie>,
        Sean Wang <sean.wang@...iatek.com>,
        Ryder Lee <ryder.lee@...iatek.com>,
        Colin Ian King <colin.king@...onical.com>,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        dri-devel@...ts.freedesktop.org, srv_heupstream@...iatek.com,
        bibby.hsieh@...iatek.com, jamesjj.liao@...iatek.com,
        jitao.shi@...iatek.com
Subject: Re: [PATCH 4/9] drm/mediatek: fix the rate and divder of hdmi phy for
 MT2701



On 04/01/2019 08:03, chunhui dai wrote:
> fix the rate and divder of hdmi phy for MT2701.

This is a bug? Then we would need a fixes tag.
Otherwise you should explain in the commit, that you need to change the
calculation due to previous commits.

Regards,
Matthias

> 
> Signed-off-by: chunhui dai <chunhui.dai@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> index a28a32d..10b6235 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c
> @@ -114,8 +114,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate,
>  
>  	if (rate <= 64000000)
>  		pos_div = 3;
> -	else if (rate <= 12800000)
> -		pos_div = 1;
> +	else if (rate <= 128000000)
> +		pos_div = 2;
>  	else
>  		pos_div = 1;
>  
> 

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