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Message-ID: <1547106849-3476-1-git-send-email-shirish.s@amd.com>
Date: Thu, 10 Jan 2019 07:54:33 +0000
From: "S, Shirish" <Shirish.S@....com>
To: --cc=Borislav Petkov <bp@...en8.de>
CC: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H . Peter Anvin" <hpa@...or.com>,
"maintainer : X86 ARCHITECTURE" <x86@...nel.org>,
Tony Luck <tony.luck@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
"open list : X86 ARCHITECTURE" <linux-kernel@...r.kernel.org>,
"S, Shirish" <Shirish.S@....com>
Subject: [PATCH 0/3] x86/mce/amd: apply missing quirks to family 15 models
(v2)
Below patch series applies to family 15 CPU's of AMD platform, to address a
consistent warning of:
"[Firmware Bug]: cpu 0, invalid threshold interrupt offset ..."
at every boot and every resume, which is misguiding as the reason is not a
Firmware Bug but "MC4_MISC thresholding quirk" not being apporpriately applied.
Shirish S (3):
x86/mce/amd: apply MC4_MISC thresholding to all models of family 15
x86/mce/amd: carve out MC4_MISC thresholding quirk
x86/mce/amd: apply MC4_MISC thresholding quirk in resume path
arch/x86/include/asm/mce.h | 1 +
arch/x86/kernel/cpu/mce/amd.c | 6 ++++
arch/x86/kernel/cpu/mce/core.c | 65 +++++++++++++++++++++++-------------------
3 files changed, 42 insertions(+), 30 deletions(-)
--
2.7.4
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