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Message-ID: <2664471.Eeqcqp8LJD@diego>
Date: Thu, 10 Jan 2019 09:42:57 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Rob Herring <robh@...nel.org>
Cc: arm@...nel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Matthias Brugger <matthias.bgg@...il.com>,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-tegra@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
Mark Rutland <mark.rutland@....com>,
Will Deacon <will.deacon@....com>
Subject: Re: [PATCH] arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string
Am Mittwoch, 9. Januar 2019, 21:29:34 CET schrieb Rob Herring:
> The 'arm,armv8' compatible string is only for software models. It adds
> little value otherwise and is inconsistently used as a fallback on some
> platforms. Remove it from those platforms.
>
> This fixes warnings generated by the DT schema.
>
> Reported-by: Michal Simek <michal.simek@...inx.com>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Will Deacon <will.deacon@....com>
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
For the Rockchip-parts
Acked-by: Heiko Stuebner <heiko@...ech.de>
> diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi
> b/arch/arm64/boot/dts/rockchip/px30.dtsi index 9aa8d5ef9e45..eb992d60e6ba
> 100644
> --- a/arch/arm64/boot/dts/rockchip/px30.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi
> @@ -40,7 +40,7 @@
>
> cpu0: cpu@0 {
> device_type = "cpu";
> - compatible = "arm,cortex-a35", "arm,armv8";
> + compatible = "arm,cortex-a35";
> reg = <0x0 0x0>;
> enable-method = "psci";
> clocks = <&cru ARMCLK>;
> @@ -52,7 +52,7 @@
>
> cpu1: cpu@1 {
> device_type = "cpu";
> - compatible = "arm,cortex-a35", "arm,armv8";
> + compatible = "arm,cortex-a35";
> reg = <0x0 0x1>;
> enable-method = "psci";
> clocks = <&cru ARMCLK>;
> @@ -64,7 +64,7 @@
>
> cpu2: cpu@2 {
> device_type = "cpu";
> - compatible = "arm,cortex-a35", "arm,armv8";
> + compatible = "arm,cortex-a35";
> reg = <0x0 0x2>;
> enable-method = "psci";
> clocks = <&cru ARMCLK>;
> @@ -76,7 +76,7 @@
>
> cpu3: cpu@3 {
> device_type = "cpu";
> - compatible = "arm,cortex-a35", "arm,armv8";
> + compatible = "arm,cortex-a35";
> reg = <0x0 0x3>;
> enable-method = "psci";
> clocks = <&cru ARMCLK>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index ecd7f19c3542..0f72bb33ce86
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
> @@ -37,7 +37,7 @@
>
> cpu0: cpu@0 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x0>;
> clocks = <&cru ARMCLK>;
> #cooling-cells = <2>;
> @@ -49,7 +49,7 @@
>
> cpu1: cpu@1 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x1>;
> clocks = <&cru ARMCLK>;
> #cooling-cells = <2>;
> @@ -61,7 +61,7 @@
>
> cpu2: cpu@2 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x2>;
> clocks = <&cru ARMCLK>;
> #cooling-cells = <2>;
> @@ -73,7 +73,7 @@
>
> cpu3: cpu@3 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x3>;
> clocks = <&cru ARMCLK>;
> #cooling-cells = <2>;
> diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 7014d10b954c..06e7c31d7d07
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
> @@ -73,7 +73,7 @@
>
> cpu_l0: cpu@0 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x0>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -81,7 +81,7 @@
>
> cpu_l1: cpu@1 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x1>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -89,7 +89,7 @@
>
> cpu_l2: cpu@2 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x2>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -97,7 +97,7 @@
>
> cpu_l3: cpu@3 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x3>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -105,7 +105,7 @@
>
> cpu_b0: cpu@100 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x100>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -113,7 +113,7 @@
>
> cpu_b1: cpu@101 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x101>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -121,7 +121,7 @@
>
> cpu_b2: cpu@102 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x102>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> @@ -129,7 +129,7 @@
>
> cpu_b3: cpu@103 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x103>;
> enable-method = "psci";
> #cooling-cells = <2>; /* min followed by max */
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 6cc1c9fa4ea6..db9d948c0b03
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -68,7 +68,7 @@
>
> cpu_l0: cpu@0 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x0>;
> enable-method = "psci";
> clocks = <&cru ARMCLKL>;
> @@ -79,7 +79,7 @@
>
> cpu_l1: cpu@1 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x1>;
> enable-method = "psci";
> clocks = <&cru ARMCLKL>;
> @@ -90,7 +90,7 @@
>
> cpu_l2: cpu@2 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x2>;
> enable-method = "psci";
> clocks = <&cru ARMCLKL>;
> @@ -101,7 +101,7 @@
>
> cpu_l3: cpu@3 {
> device_type = "cpu";
> - compatible = "arm,cortex-a53", "arm,armv8";
> + compatible = "arm,cortex-a53";
> reg = <0x0 0x3>;
> enable-method = "psci";
> clocks = <&cru ARMCLKL>;
> @@ -112,7 +112,7 @@
>
> cpu_b0: cpu@100 {
> device_type = "cpu";
> - compatible = "arm,cortex-a72", "arm,armv8";
> + compatible = "arm,cortex-a72";
> reg = <0x0 0x100>;
> enable-method = "psci";
> clocks = <&cru ARMCLKB>;
> @@ -123,7 +123,7 @@
>
> cpu_b1: cpu@101 {
> device_type = "cpu";
> - compatible = "arm,cortex-a72", "arm,armv8";
> + compatible = "arm,cortex-a72";
> reg = <0x0 0x101>;
> enable-method = "psci";
> clocks = <&cru ARMCLKB>;
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