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Date:   Thu, 10 Jan 2019 09:31:29 -0800
From:   Linus Torvalds <>
To:     Josh Poimboeuf <>
Cc:     "the arch/x86 maintainers" <>,
        Linux List Kernel Mailing <>,
        Ard Biesheuvel <>,
        Andy Lutomirski <>,
        Steven Rostedt <>,
        Peter Zijlstra <>,
        Ingo Molnar <>,
        Thomas Gleixner <>,
        Masami Hiramatsu <>,
        Jason Baron <>, Jiri Kosina <>,
        David Laight <>,
        Borislav Petkov <>,
        Julia Cartwright <>, Jessica Yu <>,
        "H. Peter Anvin" <>, Nadav Amit <>,
        Rasmus Villemoes <>,
        Edward Cree <>,
        Daniel Bristot de Oliveira <>
Subject: Re: [PATCH v3 0/6] Static calls

On Wed, Jan 9, 2019 at 2:59 PM Josh Poimboeuf <> wrote:
> NOTE: At least experimentally, the call destination writes seem to be
> atomic with respect to instruction fetching.  On Nehalem I can easily
> trigger crashes when writing a call destination across cachelines while
> reading the instruction on other CPU; but I get no such crashes when
> respecting cacheline boundaries.

I still doubt ifetch is atomic on a cacheline boundary for the simple
reason that the bus between the IU and the L1 I$ is narrower in older

Also, the fill of the L1 I$ from the (cache coherent L2) may not be a
cacheline at a time either.

That said, the fetch may be sufficiently ordered that it works in
practice. It _would_ be absolutely lovely to be able to do things like

I do agree with Nadav that if there's some way to avoid this, it would
be good. I'm not in general a huge fan of compiler plugins (compiler
instability is just about my worst fear, and I feel plugins tend to
open up that area a lot), but it does feel like this might be
something where compiler tweaking would possibly be the cleanest


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