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Message-ID: <20190111161120.GA6491@bogus>
Date:   Fri, 11 Jan 2019 10:11:20 -0600
From:   Rob Herring <robh@...nel.org>
To:     Sowjanya Komatineni <skomatineni@...dia.com>
Cc:     robh+dt@...nel.org, mark.rutland@....com, mperttunen@...dia.com,
        thierry.reding@...il.com, jonathanh@...dia.com,
        adrian.hunter@...el.com, ulf.hansson@...aro.org,
        devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        Sowjanya Komatineni <skomatineni@...dia.com>
Subject: Re: [PATCH V3 1/3] dt-bindings: mmc: tegra: Add pinctrl for pad
 drive strength config

On Wed, 2 Jan 2019 12:57:52 -0800, Sowjanya Komatineni wrote:
> Add pinctrl for 3V3 and 1V8 pad drive strength configuration for
> Tegra210 sdmmc which has pad configuration registers in the pinmux
> reigster domain.
> Pad drive strengths for Tegra186 and Later are
> part of SDMMC device node itself.
> 
> Signed-off-by: Sowjanya Komatineni <skomatineni@...dia.com>
> ---
>  Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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