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Message-ID: <154724451211.169631.16582455779809137159@swboyd.mtv.corp.google.com>
Date: Fri, 11 Jan 2019 14:08:32 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Brian Masney <masneyb@...tation.org>, andy.gross@...aro.org,
bjorn.andersson@...aro.org, linus.walleij@...aro.org
Cc: marc.zyngier@....com, shawnguo@...nel.org, dianders@...omium.org,
linux-gpio@...r.kernel.org, nicolas.dechesne@...aro.org,
niklas.cassel@...aro.org, david.brown@...aro.org,
robh+dt@...nel.org, mark.rutland@....com, thierry.reding@...il.com,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v3 4/6] qcom: spmi-gpio: add support for hierarchical IRQ chip
Quoting Brian Masney (2019-01-09 17:12:56)
> spmi-gpio did not have any irqchip support so consumers of this in
> device tree would need to call gpio[d]_to_irq() in order to get the
> proper IRQ on the underlying PMIC. IRQ chips in device tree should
> be usable from the start without the consumer having to make an
> additional call to get the proper IRQ on the parent. This patch adds
> hierarchical IRQ chip support to the spmi-gpio code to correct this
> issue.
>
> Driver was tested using the volume buttons (via gpio-keys) on the LG
> Nexus 5 (hammerhead) phone with the following two configurations.
>
> volume-up {
> interrupts-extended = <&pm8941_gpios 2 IRQ_TYPE_EDGE_BOTH>;
> ...
> };
>
> volume-up {
> gpios = <&pm8941_gpios 2 GPIO_ACTIVE_LOW>;
> ...
> };
>
> Both configurations now show that spmi-gpio is the IRQ domain and that
> the IRQ is setup in a hierarchy.
>
> $ grep volume_up /proc/interrupts
> 72: 6 0 spmi-gpio 1 Edge volume_up
>
> $ cat /sys/kernel/debug/irq/irqs/72
> handler: handle_edge_irq
> device: (null)
> status: 0x00000403
> _IRQ_NOPROBE
> istate: 0x00000000
> ddepth: 0
> wdepth: 0
> dstate: 0x02400203
> IRQ_TYPE_EDGE_RISING
> IRQ_TYPE_EDGE_FALLING
> IRQD_ACTIVATED
> IRQD_IRQ_STARTED
> node: 0
> affinity: 0-3
> effectiv:
> domain: :soc:spmi@...cf000:pm8941@0:gpios@...0
> hwirq: 0x1
> chip: spmi-gpio
> flags: 0x4
> IRQCHIP_MASK_ON_SUSPEND
> parent:
> domain: :soc:spmi@...cf000
> hwirq: 0xc100057
> chip: pmic_arb
> flags: 0x4
> IRQCHIP_MASK_ON_SUSPEND
>
> Signed-off-by: Brian Masney <masneyb@...tation.org>
> ---
Reviewed-by: Stephen Boyd <sboyd@...nel.org>
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