linux-kernel - Re: [PATCH 1/3] media: dt: bindings: sunxi-ir: Add A64 compatible

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Message-ID: <4866484.1b519qCrCi@jernej-laptop>
Date:   Sat, 12 Jan 2019 09:08:08 +0100
From:   Jernej Škrabec <jernej.skrabec@...l.net>
To:     Chen-Yu Tsai <wens@...e.org>
Cc:     Maxime Ripard <maxime.ripard@...tlin.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Linux Media Mailing List <linux-media@...r.kernel.org>,
        devicetree <devicetree@...r.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [PATCH 1/3] media: dt: bindings: sunxi-ir: Add A64 compatible

Dne sobota, 12. januar 2019 ob 02:56:11 CET je Chen-Yu Tsai napisal(a):
> On Sat, Jan 12, 2019 at 1:30 AM Jernej Skrabec <jernej.skrabec@...l.net> 
wrote:
> > A64 IR is compatible with A13, so add A64 compatible with A13 as a
> > fallback.
> 
> We ask people to add the SoC-specific compatible as a contigency,
> in case things turn out to be not so "compatible".
> 
> To be consistent with all the other SoCs and other peripherals,
> unless you already spotted a "compatible" difference in the
> hardware, i.e. the hardware isn't completely the same, this
> patch isn't needed. On the other hand, if you did, please mention
> the differences in the commit log.

When comparing registers descriptions between A13 and A64, I noticed few minor 
differences:

A13: RXINT: 11:6 RAL
A64: RXINT: 13:8 RAL

A13: IR_RXSTA: 12:6 RAC
A64: IR_RXSTA: 14:8 RAC, 7 STAT (missing on A13)

What is strange that  RAL and RAC field have offset defined as 8 in driver. I'm 
not sure if that is a typo in A13 manual or driver issue. I assume the former, 
otherwise it wouldn't work. I couldn't found original BSP driver source to 
confirm, though.

STAT bit is really not that important. It just tells if IR unit is busy or 
not.

The biggest difference is in 0x34 register. A64 has one more clock option 
(without postdivider), although register values are backward compatible. A64 
also has Active threshold setting (duration of CIR going from idle to active 
state).

If we dismiss RAC and RAL differences as manual error and don't care for new 
clock option and active threshold, then having new compatible maybe really 
doesn't make sense.

Best regards,
Jernej

> 
> ChenYu
> 
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@...l.net>
> > ---
> > 
> >  Documentation/devicetree/bindings/media/sunxi-ir.txt | 5 ++++-
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt
> > b/Documentation/devicetree/bindings/media/sunxi-ir.txt index
> > 278098987edb..ecac6964b69b 100644
> > --- a/Documentation/devicetree/bindings/media/sunxi-ir.txt
> > +++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt
> > @@ -1,7 +1,10 @@
> > 
> >  Device-Tree bindings for SUNXI IR controller found in sunXi SoC family
> > 
> >  Required properties:
> > -- compatible       : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir"
> > +- compatible       : value must be one of:
> > +  * "allwinner,sun4i-a10-ir"
> > +  * "allwinner,sun5i-a13-ir"
> > +  * "allwinner,sun50i-a64-ir", "allwinner,sun5i-a13-ir"
> > 
> >  - clocks           : list of clock specifiers, corresponding to
> >  
> >                       entries in clock-names property;
> >  
> >  - clock-names      : should contain "apb" and "ir" entries;
> > 
> > --
> > 2.20.1