linux-kernel - Re: [PATCH v2 1/7] dt-bindings: soc: qcom: Add AOSS QMP binding

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <154750505285.169631.15400388488161882052@swboyd.mtv.corp.google.com>
Date:   Mon, 14 Jan 2019 14:30:52 -0800
From:   Stephen Boyd <swboyd@...omium.org>
To:     Andy Gross <andy.gross@...aro.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        David Brown <david.brown@...aro.org>,
        Mark Rutland <mark.rutland@....com>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Russell King <linux@...linux.org.uk>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Arun Kumar Neelakantam <aneela@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, linux-soc@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/7] dt-bindings: soc: qcom: Add AOSS QMP binding

Quoting Bjorn Andersson (2019-01-06 00:09:09)
> Add binding for the QMP based side-channel communication mechanism to
> the AOSS, which is used to control resources not exposed through the
> RPMh interface.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>

Reviewed-by: Stephen Boyd <swboyd@...omium.org>

one nit below.

> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
> new file mode 100644
> index 000000000000..9b0d9785efe0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
> @@ -0,0 +1,57 @@
> += EXAMPLE
> +
> +The following example represents the AOSS side-channel message RAM and the
> +mechanism exposing the power-domains, as found in SDM845.
> +
> +  aoss_qmp: qmp@...0000 {
> +          compatible = "qcom,sdm845-aoss-qmp";
> +          reg = <0x0c300000 0x100000>;
> +          interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
> +          mboxes = <&apss_shared 0>;
> +
> +         #power-domain-cells = <1>;

This is weirdly tabbed out.