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Message-ID: <a9d5a1a9-ae8f-5db0-106f-e69158163ba3@ti.com>
Date:   Mon, 14 Jan 2019 19:11:44 +0530
From:   Kishon Vijay Abraham I <kishon@...com>
To:     Jens Axboe <axboe@...nel.dk>, <john.hubbard@...il.com>,
        Jisheng Zhang <Jisheng.Zhang@...aptics.com>,
        Rob Herring <robh@...nel.org>
CC:     LKML <linux-kernel@...r.kernel.org>,
        John Hubbard <jhubbard@...dia.com>,
        Grzegorz Jaszczyk <jaz@...ihalf.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH 1/1] phy: fix build breakage: add PHY_MODE_SATA



On 13/01/19 7:35 AM, Jens Axboe wrote:
> On 1/12/19 6:29 PM, john.hubbard@...il.com wrote:
>> From: John Hubbard <jhubbard@...dia.com>
>>
>> Commit 49e54187ae0b ("ata: libahci_platform: comply to PHY framework") uses
>> the PHY_MODE_SATA, but that enum had not yet been added. This caused a
>> build failure for me, with today's linux.git.
>>
>> Also, there is a potentially conflicting (mis-named) PHY_MODE_SATA, hiding
>> in the Marvell Berlin SATA PHY driver.
>>
>> Fix the build by:
>>
>>     1) Renaming Marvell's defined value to a more scoped name,
>>        in order to avoid any potential conflicts: PHY_BERLIN_MODE_SATA.
>>
>>     2) Adding the missing enum, which was going to be added anyway as part
>>        of [1].
>>
>> [1] https://lkml.kernel.org/r/20190108163124.6409-3-miquel.raynal@bootlin.com
>>
>> Fixes: 49e54187ae0b ("ata: libahci_platform: comply to PHY framework")
> 
> Linus, this is probably a better option in terms of what should go in to
> fix that commit.
> 
>>
>> Cc: Grzegorz Jaszczyk <jaz@...ihalf.com>
>> Cc: Miquel Raynal <miquel.raynal@...tlin.com>
>> Cc: Hans de Goede <hdegoede@...hat.com>
>> Cc: Jens Axboe <axboe@...nel.dk>
>> Signed-off-by: John Hubbard <jhubbard@...dia.com>

Acked-by: Kishon Vijay Abraham I <kishon@...com>
>> ---
>>  drivers/phy/marvell/phy-berlin-sata.c | 5 +++--
>>  include/linux/phy/phy.h               | 1 +
>>  2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/phy/marvell/phy-berlin-sata.c b/drivers/phy/marvell/phy-berlin-sata.c
>> index a91fc67fc4e0..d70ba9bc42d9 100644
>> --- a/drivers/phy/marvell/phy-berlin-sata.c
>> +++ b/drivers/phy/marvell/phy-berlin-sata.c
>> @@ -32,7 +32,7 @@
>>  
>>  /* register 0x01 */
>>  #define REF_FREF_SEL_25		BIT(0)
>> -#define PHY_MODE_SATA		(0x0 << 5)
>> +#define PHY_BERLIN_MODE_SATA	(0x0 << 5)
>>  
>>  /* register 0x02 */
>>  #define USE_MAX_PLL_RATE	BIT(12)
>> @@ -102,7 +102,8 @@ static int phy_berlin_sata_power_on(struct phy *phy)
>>  
>>  	/* set PHY mode and ref freq to 25 MHz */
>>  	phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x01,
>> -				    0x00ff, REF_FREF_SEL_25 | PHY_MODE_SATA);
>> +				    0x00ff,
>> +				    REF_FREF_SEL_25 | PHY_BERLIN_MODE_SATA);
>>  
>>  	/* set PHY up to 6 Gbps */
>>  	phy_berlin_sata_reg_setbits(ctrl_reg, priv->phy_base, 0x25,
>> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
>> index e8e118d70fd7..3f350e2749fe 100644
>> --- a/include/linux/phy/phy.h
>> +++ b/include/linux/phy/phy.h
>> @@ -42,6 +42,7 @@ enum phy_mode {
>>  	PHY_MODE_PCIE,
>>  	PHY_MODE_ETHERNET,
>>  	PHY_MODE_MIPI_DPHY,
>> +	PHY_MODE_SATA
>>  };
>>  
>>  /**
>>
> 
> 

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