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Message-ID: <CACPK8Xf-54Q7s_z8J=ZBoYqiFuy7_QAvsDqgT2CO0LFOvx8tqg@mail.gmail.com>
Date: Mon, 14 Jan 2019 16:15:46 +1030
From: Joel Stanley <joel@....id.au>
To: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Andrew Jeffery <andrew@...id.au>,
Arnd Bergmann <arnd@...db.de>,
devicetree <devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Jason M Biils <jason.m.bills@...ux.intel.com>,
Haiyue Wang <haiyue.wang@...ux.intel.com>,
James Feist <james.feist@...ux.intel.com>,
Vernon Mauery <vernon.mauery@...ux.intel.com>
Subject: Re: [PATCH v10 05/12] ARM: dts: aspeed: peci: Add PECI node
Hi Jae,
On Tue, 8 Jan 2019 at 08:11, Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com> wrote:
>
> This commit adds PECI bus/adapter node of AST24xx/AST25xx into
> aspeed-g4 and aspeed-g5.
This looks good, aside from the alias.
It will go via my aspeed tree once the bindings are merged. Send them
to linux-aspeed@...ts.ozlabs.org at that time.
In the future I suggest leaving the changes to arch/arm/boot/dts until
after the bindings and driver patches have landed. They will rarely go
in before hand as the bindings need to be agreed on.
> serial3 = &uart4;
> serial4 = &uart5;
> serial5 = &vuart;
> + peci0 = &peci0;
I don't think this is necessary. Can you explain why you think you need it?
Cheers,
Joel
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