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Message-ID: <6aebbf86-2ba1-c517-dc47-054279daec49@cn.fujitsu.com>
Date:   Tue, 15 Jan 2019 19:45:10 +0800
From:   Cao jin <caoj.fnst@...fujitsu.com>
To:     Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, <bp@...en8.de>,
        "H. Peter Anvin" <hpa@...or.com>
CC:     <kirill.shutemov@...ux.intel.com>,
        LKML <linux-kernel@...r.kernel.org>
Subject: question about head_64.S

Hi,
  I have been digging into this file for a while, and I still have 2
questions unclear, hope to get your help.

1.
At the entry of startup_64, we set all the data segment registers to 0,
according to commit 08da5a2ca("x86_64: Early segment setup for VT"), it
is said to accelerate the decompression under VT. I don't know Intel VT,
but I did test under physical machine and virtual machine(with KVM, and
intel VT enabled in BIOS) with following patch:

diff --git a/arch/x86/boot/compressed/head_64.S
b/arch/x86/boot/compressed/head_64.S
index 58f6a467f1fa..595f3c300173 100644
--- a/arch/x86/boot/compressed/head_64.S
+++ b/arch/x86/boot/compressed/head_64.S
@@ -260,12 +260,12 @@ ENTRY(startup_64)
         */

        /* Setup data segments. */
-       xorl    %eax, %eax
-       movl    %eax, %ds
-       movl    %eax, %es
-       movl    %eax, %ss
-       movl    %eax, %fs
-       movl    %eax, %gs
+//     xorl    %eax, %eax
+//     movl    %eax, %ds
+//     movl    %eax, %es
+//     movl    %eax, %ss
+//     movl    %eax, %fs
+//     movl    %eax, %gs

I don't see any obvious booting time difference, is there anything I missed?
Also, I don't find explicit document saying we should zero these
registers under VT.

2.
Why gdt64 has following definition?:

gdt64:
	.word	gdt_end - gdt
	.long	0
	.word	0
	.quad   0

obviously, gdt64 stores the GDTR content under x86_64, which is 10 bytes
long, so why not just:

gdt64:
	.word	gdt_end - gdt
	.quad   0

With above modification, it can boot.
-- 
Sincerely,
Cao jin


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