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Message-ID: <ed46005be5beff6efc47d40cea304185efa2bcc0.1547629763.git.nicolas.ferre@microchip.com>
Date:   Wed, 16 Jan 2019 10:57:38 +0100
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Ludovic Desroches <ludovic.desroches@...rochip.com>
CC:     <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        Sebastian Reichel <sre@...nel.org>, <linux-pm@...r.kernel.org>,
        <netdev@...r.kernel.org>, "David S . Miller" <davem@...emloft.net>,
        <linux-usb@...r.kernel.org>,
        Alan Stern <stern@...land.harvard.edu>,
        "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
        Rob Herring <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>
Subject: [PATCH 2/8] dt-bindings: arm: atmel: add new sam9x60 reset controller binding

Update the Reset Controller's binding to add new SoC compatibility string.

Signed-off-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
---
 Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
index 36952cc39993..badce6ef3ab3 100644
--- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
@@ -22,6 +22,7 @@ Its subnodes can be:
 RSTC Reset Controller required properties:
 - compatible: Should be "atmel,<chip>-rstc".
   <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7"
+  it also can be "microchip,sam9x60-rstc"
 - reg: Should contain registers location and length
 - clocks: phandle to input clock.
 
-- 
2.17.1

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