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Message-ID: <CAD=FV=UPwHux1nBm_eO3Uida6hSZLrOwdMpjMQQb5daa3USpqg@mail.gmail.com>
Date: Thu, 17 Jan 2019 09:47:16 -0800
From: Doug Anderson <dianders@...omium.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Stephen Boyd <swboyd@...omium.org>,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
devicetree@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 1/2] arm64: dts: qcom: sdm845: Increase address and
size cells for soc
Hi,
On Wed, Jan 16, 2019 at 8:30 PM Bjorn Andersson
<bjorn.andersson@...aro.org> wrote:
>
> The busses on SDM845 provides 36 address bits, extend the address and
> size cells to make it possible to describe this in "ranges" and
> "dma-ranges".
>
> While touching all reg properties, addresses are padded to 8 digits.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
>
> Changes since v3:
> - Split out address-cells/size-cells change
> - Rewrote commit message from scratch
>
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 300 +++++++++++++--------------
> 1 file changed, 150 insertions(+), 150 deletions(-)
It was "fun" trying to apply this patch since you now based it on
Andy's for-next branch plus outstanding patches. I suppose that's my
fault for suggesting that, but maybe next time it would be helpful if
you could publish a branch somewhere that provided your basis?
NOTE: my tree also has "qcom,sdm845-lpasscc" so I had to manually fix
that last address too. I believe you left this out of your tree
because it was causing you trouble on MTP. That's fine and upstream
can fix it up when it lands.
In general everything here looks good though and I'd suggest landing
it (and the patches it depends on) ASAP because otherwise we'll keep
fighting conflicts.
Reviewed-by: Douglas Anderson <dianders@...omium.org>
Tested-by: Douglas Anderson <dianders@...omium.org>
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