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Message-ID: <AM0PR04MB421154DA0EFFA8125F151171809C0@AM0PR04MB4211.eurprd04.prod.outlook.com>
Date: Fri, 18 Jan 2019 09:45:11 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: Lucas Stach <l.stach@...gutronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
dl-linux-imx <linux-imx@....com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
Marc Zyngier <marc.zyngier@....com>
Subject: RE: [PATCH 1/4] dt-binding: irq: imx-irqsteer: use irq number per
channel instead of group number
> -----Original Message-----
> From: Lucas Stach [mailto:l.stach@...gutronix.de]
> Sent: Friday, January 18, 2019 4:48 PM
>
> Am Freitag, den 18.01.2019, 07:53 +0000 schrieb Aisheng Dong:
> > Not all 64 interrupts may be used in one group. e.g. most irqsteer in
> > imx8qxp and imx8qm subsystems supports only 32 interrupts.
> >
> > As the IP integration parameters are Channel number and interrupts
> > number, let's use fsl,irqs-per-chan to represents how many interrupts
> > supported by this irqsteer channel.
>
> Sorry, but total NACK. I've got to great lengths with dumping the actually
> implemented register layout on i.MX8M and AFAICS the IRQs are always
> managed in groups of 64 IRQs, even if less than that are connected as input
> IRQs. This is what the actually present register set on i.MX8M tells us.
>
The register layout varies depends on the irq per channel supports.
It's true 64 IRQs on MX8M, but not true for QXP and QM.
That's why we shouldn't use fsl,irq-groups.
Regards
Dong Aisheng
> Regards,
> Lucas
>
> > Cc: Marc Zyngier <marc.zyngier@....com>
> > > Cc: Rob Herring <robh+dt@...nel.org>
> > > Cc: Lucas Stach <l.stach@...gutronix.de>
> > > Cc: Shawn Guo <shawnguo@...nel.org>
> > Cc: devicetree@...r.kernel.org
> > > Signed-off-by: Dong Aisheng <aisheng.dong@....com>
> > ---
> > .../devicetree/bindings/interrupt-controller/fsl,irqsteer.txt |
> > 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.
> > txt
> > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.
> > txt
> > index 45790ce..eaabcda 100644
> > ---
> > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.
> > txt
> > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqst
> > +++ eer.txt
> > @@ -16,8 +16,8 @@ Required properties:
> > - #interrupt-cells: Specifies the number of cells needed to encode an
> > interrupt source. The value must be 1.
> > - fsl,channel: The output channel that all input IRQs should be steered into.
> > -- fsl,irq-groups: Number of IRQ groups managed by this controller instance.
> > - Each group manages 64 input interrupts.
> > +- fsl,irqs-per-chan: Number of input interrupts per channel. Should
> > +be multiple of 32
> > + input interrupts and up to 512 interrupts.
> >
> > Example:
> >
> > @@ -28,7 +28,7 @@ Example:
> > > clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
> > > clock-names = "ipg";
> > > fsl,channel = <0>;
> > > - fsl,irq-groups = <1>;
> > > + fsl,irqs-per-chan= <64>;
> > > interrupt-controller;
> > > #interrupt-cells = <1>;
> > > };
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