Message-Id: <20190118152352.26417-1-maxime.chevallier@bootlin.com>
Date:   Fri, 18 Jan 2019 16:23:45 +0100
From:   Maxime Chevallier <maxime.chevallier@...tlin.com>
To:     davem@...emloft.net
Cc:     Maxime Chevallier <maxime.chevallier@...tlin.com>,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        linux-arm-kernel@...ts.infradead.org,
        Antoine Tenart <antoine.tenart@...tlin.com>,
        thomas.petazzoni@...tlin.com, gregory.clement@...tlin.com,
        miquel.raynal@...tlin.com, nadavh@...vell.com, stefanc@...vell.com,
        mw@...ihalf.com
Subject: [PATCH net-next 0/7] net: phy: Add support for 2.5GBASET PHYs

Hello everyone,

This series introduces support for 2.5GBASET mode in Network PHYs, and
implements that support in some PHYs in the Marvell Alaska product
range, the PPv2 driver, and a new PHY from the Alaska family.

2.5GBASET and 5GBASET were originally defined by the NBASET alliance,
and are now being specified as an IEEE standard, under the 802.3bz
specification.

The first patch in the series generalizes the way we build the list of
supported modes in C45 PHYs, relying on the various modes exposed in the
PMA registers. It extracts the logic from the marvell10g driver.

The second patch adds the new register definitions from the 802.3bz
specifications, and adds the generic code to handle both 2.5GBASET and
5GBASET.

The third patch allows to automatically detect whether or not a PHY
supports 2.5GBASET and 5GBASET, by reading the PMA abilities.

Patches 4 and 5 add support for 2.5GBASET into the marvell10g driver,
with a workaround for incorrect abilities being reported by the 88X3310
and the 88E2010 PHYs. (see patch 5).

Patch 6 adds support for 2.5GBASET in the PPv2 ethernet driver, thus
enabling support for that mode on the MacchiatoBin.

Finally, patch 7 introduces support for the 88x2110 PHY, which is very
similar to the 88x3310, the only difference being the lack of Fiber
support. The 88x2110 already reports the correct abilities from it's
PMA, and thus doesn't require the workaround implemented in patch 5 for
2.5GBASET to work. This is based on work originally done by Antoine Tenart.

This patch series was tested on the MacchiatoBin, a custom board using a
88e2010, and another using a 88x2110.

The 88x2110 support is enclosed in the series to better show the need
for the workaround in the 88x3310, feel free to tell me if we should
handle such hardware issues in another way, or if support for that PHY
should be submitted separately.

At this point, future development adding 5GBASET to Marvell PHYs should be
straightforward, but this isn't included in the series since I lack any
hardware to test the 5GBASE-R mode that the PHY uses to connect to the
MAC in that case.

Thanks to Andrew for doing the rework of the link_mode representation
this series depends on.

Maxime Chevallier (7):
  net: phy: Extract genphy_c45_read_abilities from marvell10g
  net: phy: Add generic support for 2.5GBaseT and 5GBaseT
  net: phy: Read 2.5G and 5G extended abilities
  net: phy: marvell10g: Add support for 2.5GBASET and 5GBASET
  net: phy: marvell10g: Force reading of 2.5/5G PMA extended abilities
  net: mvpp2: Add 2.5GBaseT support
  net: phy: marvell10g: add support for the 88x2110 PHY

 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   |   1 +
 drivers/net/phy/marvell10g.c                  | 155 +++++++++---------
 drivers/net/phy/phy-c45.c                     | 132 +++++++++++++++
 include/linux/phy.h                           |   1 +
 include/uapi/linux/mdio.h                     |  16 ++
 5 files changed, 226 insertions(+), 79 deletions(-)

-- 
2.19.2

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