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Message-ID: <20190121123547.GF29166@zn.tnic>
Date: Mon, 21 Jan 2019 13:35:47 +0100
From: Borislav Petkov <bp@...en8.de>
To: Sasha Levin <sashal@...nel.org>
Cc: mchehab@...nel.org, ruizhao@...rosoft.com,
linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-kernel@...rosoft.com, will.deacon@....com, okaya@...nel.org
Subject: Re: [PATCH] EDAC, dmc520:: add DMC520 EDAC driver
On Fri, Jan 18, 2019 at 11:23:24AM -0500, Sasha Levin wrote:
> From: Rui Zhao <ruizhao@...rosoft.com>
>
> New driver supports DRAM error detection and correction on DMC520
> controller.
That's this thing, right?
https://developer.arm.com/products/system-ip/memory-controllers/corelink-dmc-520
> Validated on actual hardware:
Which is what exactly?
This looks like a driver for the memory controller IP and that could get
integrated in other platforms so I'd prefer if this driver was called
<your_platform>_edac and the DMC520 was a generic piece of functionality
like the FSL memory controller IP:
mpc85xx_edac_mod-y := fsl_ddr_edac.o mpc85xx_edac.o
obj-$(CONFIG_EDAC_MPC85XX) += mpc85xx_edac_mod.o
layerscape_edac_mod-y := fsl_ddr_edac.o layerscape_edac.o
obj-$(CONFIG_EDAC_LAYERSCAPE) += layerscape_edac_mod.o
Thx.
--
Regards/Gruss,
Boris.
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